Abstract
As the complexity of System-on-a-Chip (SOC) design keeps growing rapidly, efficient and economic testing and debugging for complex circuits at silicon stage has become extremely important. In this paper we present a unified platform that facilitates efficient on-chip testing and silicon debugging in a PC-based environment. Test techniques including scan and BIST, and debug functions including online tracing, hardware breakpoint insertion and cycle-based single-stepping, are supported in this platform. An automatic design tool is also developed to simplify the generation and application ofthe platform. With this platform users can easily carry out structural testing with the scan or BIST test mode, functional verification with the on-line tracing mode, and fault diagnosis with the single-step mode.
| Original language | English |
|---|---|
| Title of host publication | ASICON 2009 - Proceedings, 2009 8th IEEE International Conference on ASIC |
| Pages | 577-580 |
| Number of pages | 4 |
| DOIs | |
| Publication status | Published - 2009 Dec 1 |
| Event | 2009 8th IEEE International Conference on ASIC, ASICON 2009 - Changsha, China Duration: 2009 Oct 20 → 2009 Oct 23 |
Publication series
| Name | ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC |
|---|
Other
| Other | 2009 8th IEEE International Conference on ASIC, ASICON 2009 |
|---|---|
| Country | China |
| City | Changsha |
| Period | 09-10-20 → 09-10-23 |
Fingerprint
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
}
A unified test and debug platform for SOC design. / Lee, Kuen-Jong; Chang, Chin Yao; Su, Alan; Liang, Si Yuan.
ASICON 2009 - Proceedings, 2009 8th IEEE International Conference on ASIC. 2009. p. 577-580 5351351 (ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - A unified test and debug platform for SOC design
AU - Lee, Kuen-Jong
AU - Chang, Chin Yao
AU - Su, Alan
AU - Liang, Si Yuan
PY - 2009/12/1
Y1 - 2009/12/1
N2 - As the complexity of System-on-a-Chip (SOC) design keeps growing rapidly, efficient and economic testing and debugging for complex circuits at silicon stage has become extremely important. In this paper we present a unified platform that facilitates efficient on-chip testing and silicon debugging in a PC-based environment. Test techniques including scan and BIST, and debug functions including online tracing, hardware breakpoint insertion and cycle-based single-stepping, are supported in this platform. An automatic design tool is also developed to simplify the generation and application ofthe platform. With this platform users can easily carry out structural testing with the scan or BIST test mode, functional verification with the on-line tracing mode, and fault diagnosis with the single-step mode.
AB - As the complexity of System-on-a-Chip (SOC) design keeps growing rapidly, efficient and economic testing and debugging for complex circuits at silicon stage has become extremely important. In this paper we present a unified platform that facilitates efficient on-chip testing and silicon debugging in a PC-based environment. Test techniques including scan and BIST, and debug functions including online tracing, hardware breakpoint insertion and cycle-based single-stepping, are supported in this platform. An automatic design tool is also developed to simplify the generation and application ofthe platform. With this platform users can easily carry out structural testing with the scan or BIST test mode, functional verification with the on-line tracing mode, and fault diagnosis with the single-step mode.
UR - http://www.scopus.com/inward/record.url?scp=77949381019&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77949381019&partnerID=8YFLogxK
U2 - 10.1109/ASICON.2009.5351351
DO - 10.1109/ASICON.2009.5351351
M3 - Conference contribution
SN - 9781424438686
T3 - ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC
SP - 577
EP - 580
BT - ASICON 2009 - Proceedings, 2009 8th IEEE International Conference on ASIC
ER -