A universal test sequence for CMOS scan registers

Kuen Jong Lee; Melvin A. Breuer

A universal test sequence for CMOS scan registers

Kuen Jong Lee
, Melvin A. Breuer

Department of Electrical Engineering

Research output: Contribution to journal › Conference article › peer-review

29 Citations (Scopus)

Abstract

A systematic method for analyzing all possible faults within the scan path of a scan-based CMOS circuit is given. The analysis shows that both logic and current monitoring are necessary in order to detect all irredundant faults. A universal test sequence is derived based on the analysis of single bridging faults. This sequence also detects all irredundant stuck-at and stuck-open faults. SPICE simulations show that CSM (current supply monitoring) method is an effective method for detecting some bridging faults.

Original language	English
Journal	Proceedings of the Custom Integrated Circuits Conference
Publication status	Published - 1990 Dec 1
Event	Proceedings of the 12th Annual IEEE 1990 Custom Integrated Circuits Conference - CICC '90 - Boston, MA, USA Duration: 1990 May 13 → 1990 May 16

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Cite this

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title = "A universal test sequence for CMOS scan registers",

abstract = "A systematic method for analyzing all possible faults within the scan path of a scan-based CMOS circuit is given. The analysis shows that both logic and current monitoring are necessary in order to detect all irredundant faults. A universal test sequence is derived based on the analysis of single bridging faults. This sequence also detects all irredundant stuck-at and stuck-open faults. SPICE simulations show that CSM (current supply monitoring) method is an effective method for detecting some bridging faults.",

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AU - Lee, Kuen Jong

AU - Breuer, Melvin A.

PY - 1990/12/1

Y1 - 1990/12/1

N2 - A systematic method for analyzing all possible faults within the scan path of a scan-based CMOS circuit is given. The analysis shows that both logic and current monitoring are necessary in order to detect all irredundant faults. A universal test sequence is derived based on the analysis of single bridging faults. This sequence also detects all irredundant stuck-at and stuck-open faults. SPICE simulations show that CSM (current supply monitoring) method is an effective method for detecting some bridging faults.

AB - A systematic method for analyzing all possible faults within the scan path of a scan-based CMOS circuit is given. The analysis shows that both logic and current monitoring are necessary in order to detect all irredundant faults. A universal test sequence is derived based on the analysis of single bridging faults. This sequence also detects all irredundant stuck-at and stuck-open faults. SPICE simulations show that CSM (current supply monitoring) method is an effective method for detecting some bridging faults.

UR - https://www.scopus.com/pages/publications/0025669314

UR - https://www.scopus.com/pages/publications/0025669314#tab=citedBy

M3 - Conference article

AN - SCOPUS:0025669314

SN - 0886-5930

JO - Proceedings of the Custom Integrated Circuits Conference

JF - Proceedings of the Custom Integrated Circuits Conference

T2 - Proceedings of the 12th Annual IEEE 1990 Custom Integrated Circuits Conference - CICC '90

Y2 - 13 May 1990 through 16 May 1990

ER -

A universal test sequence for CMOS scan registers

Abstract

All Science Journal Classification (ASJC) codes

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