In this letter, we integrated a floating bottom gate (BG) as a light shielding layer in a thin-film transistor (TFT). We observed abnormal ID-VD output characteristics and unsaturated current characteristics. In addition, drain-induced barrier lowering has a significant impact on ID-VD characteristics as the drain voltage increases. These phenomena are due to changes in electrical potential that occur due to the capacitive coupling effect. Technology computer aided design simulations explained and correlated well with our observations. Then, a physical model is proposed to verify the abnormal electrical characteristics. Grounding the BG light shield was found to provide better control over the threshold voltage and total current performance. This letter results may lead to better applications in the TFT driving circuits.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering