Abstract
XIn this paper, we use an FPGA platform and a high level synthesis tool, called Impulse C, to speedup a statistical Line Of Reaction (LOR) estimation for a high-resolution Positron Emission Tomography (PET) scanner. The estimation algorithm provides a significant improvement over conventional methods, but the execution time is too long to be practical for clinic applications. Impulse C allows us to rapidly map a C program into a platform with a host processor coupled to an FPGA device. However, the generated HDLs from the original codes are very inefficient, and the execution time is even worse than the software code. We describe some optimization methods for the algorithm using Impulse C. These methods could also be applied to other applications or used to improve the high level synthesis tools. The results show that the FPGA implementation can obtain a 82x speedup over the optimized software.
| Original language | English |
|---|---|
| Title of host publication | Proceedings - IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011 |
| Pages | 105-108 |
| Number of pages | 4 |
| DOIs | |
| Publication status | Published - 2011 Jun 17 |
| Event | 19th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011 - Salt Lake City, UT, United States Duration: 2011 May 1 → 2011 May 3 |
Publication series
| Name | Proceedings - IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011 |
|---|
Other
| Other | 19th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011 |
|---|---|
| Country | United States |
| City | Salt Lake City, UT |
| Period | 11-05-01 → 11-05-03 |
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All Science Journal Classification (ASJC) codes
- Hardware and Architecture
Cite this
}
Accelerating statistical LOR estimation for a high-resolution PET scanner using FPGA devices and a high level synthesis tool. / Chen, Zhong Ho; Su, Wen-Yu; Sun, Ming Ting; Hauck, Scott.
Proceedings - IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011. 2011. p. 105-108 5771259 (Proceedings - IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Accelerating statistical LOR estimation for a high-resolution PET scanner using FPGA devices and a high level synthesis tool
AU - Chen, Zhong Ho
AU - Su, Wen-Yu
AU - Sun, Ming Ting
AU - Hauck, Scott
PY - 2011/6/17
Y1 - 2011/6/17
N2 - XIn this paper, we use an FPGA platform and a high level synthesis tool, called Impulse C, to speedup a statistical Line Of Reaction (LOR) estimation for a high-resolution Positron Emission Tomography (PET) scanner. The estimation algorithm provides a significant improvement over conventional methods, but the execution time is too long to be practical for clinic applications. Impulse C allows us to rapidly map a C program into a platform with a host processor coupled to an FPGA device. However, the generated HDLs from the original codes are very inefficient, and the execution time is even worse than the software code. We describe some optimization methods for the algorithm using Impulse C. These methods could also be applied to other applications or used to improve the high level synthesis tools. The results show that the FPGA implementation can obtain a 82x speedup over the optimized software.
AB - XIn this paper, we use an FPGA platform and a high level synthesis tool, called Impulse C, to speedup a statistical Line Of Reaction (LOR) estimation for a high-resolution Positron Emission Tomography (PET) scanner. The estimation algorithm provides a significant improvement over conventional methods, but the execution time is too long to be practical for clinic applications. Impulse C allows us to rapidly map a C program into a platform with a host processor coupled to an FPGA device. However, the generated HDLs from the original codes are very inefficient, and the execution time is even worse than the software code. We describe some optimization methods for the algorithm using Impulse C. These methods could also be applied to other applications or used to improve the high level synthesis tools. The results show that the FPGA implementation can obtain a 82x speedup over the optimized software.
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UR - http://www.scopus.com/inward/citedby.url?scp=79958762358&partnerID=8YFLogxK
U2 - 10.1109/FCCM.2011.15
DO - 10.1109/FCCM.2011.15
M3 - Conference contribution
SN - 9780769543017
T3 - Proceedings - IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011
SP - 105
EP - 108
BT - Proceedings - IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011
ER -