ALD TiN barrier metal for pMOS devices with a chemical oxide interfacial layer for 20-nm technology node

Ying Tsung Chen, Chien Ting Lin, Wen Tai Chiang, Mon Sen Lin, Chih Wei Yang, Jian Cun Ke, Shoou Jinn Chang

Research output: Contribution to journalArticlepeer-review

8 Citations (Scopus)

Abstract

We propose the use of atomic layer deposition (ALD) TiN barrier to replace physical vapor deposition TiN barrier for high-k last/gate last pMOS devices with a chemical oxide interfacial layer in 20-nm technology node. It was found that the pMOS devices with ALD TiN exhibit lower gate leakage current density Jg and equivalent oxide thickness. Furthermore, it was found that we could achieve larger flat-band voltage Vfb and larger equivalent work function from the pMOS devices with ALD TiN barrier. It was also found that we could further improve the performances of the fabricated pMOS devices by increasing the ALD TiN thickness from 2 to 3 nm.

Original languageEnglish
Article number6714375
Pages (from-to)306-308
Number of pages3
JournalIEEE Electron Device Letters
Volume35
Issue number3
DOIs
Publication statusPublished - 2014 Mar

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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