Al_0.3Ga_0.7N/GaN heterostructure transistors with a regrown p-GaN gate formed with selective-area Si implantation as the regrowth mask

This study demonstrates an Al_0.3Ga_0.7N/GaN heterostructure field-effect transistor (HFET), which features a regrown p-GaN gate layer formed by selective-area regrowth using Si ion implantation at the drain and source area as a mask layer. The surface of the Si-implanted area has distorted lattices compared with the implantation-free area. As such, selective-area growth (SAG) can be achieved when the regrowth process is performed using the Al_0.3Ga_0.7N/GaN heterostructure with selective-area Si implantation as growth templates. The Ti/Al/Ti/Au metal scheme is then deposited on the surface of the Si-implanted Al_0.3Ga_0.7N layer after the regrowth of the p-GaN gate layer. The Ti/Al/Ti/Au contacts without subsequent thermal alloying on the Si-implanted Al_0.3Ga_0.7N layers exhibit a typical specific contact resistance of approximately 4.5 × 10⁻⁴ Ω cm². However, the Ti/Al/Ti/Au contacts deposited on the undoped Al_0.3Ga_0.7N layer exhibit Schottky I–V characteristics even the samples are alloyed at high temperatures. According to the results described above, an Al_0.3Ga_0.7N/GaN HFET with a p-GaN gate layer formed by SAG on the Si-implanted Al_0.3Ga_0.7N layer is also demonstrated in this study.