An area-efficient color demosaicking scheme for vlsi architecture

Yeu Horng Shiau, Pei Yin Chen, Chia Wen Chang

Research output: Contribution to journalArticlepeer-review

13 Citations (Scopus)


In this paper, we propose an efficient demosaicking design, which achieves good image quality with very low computational complexity and less line-buffer memory. Our demosaicking scheme exploits both edge information and inter-channel correlations to improve the quality of the interpolated image. Furthermore, we develop a tight and low-cost VLSI architecture for the scheme by using the resource sharing and pipeline scheduling approaches. Compared with previous demosaicking designs, our circuit requires the least hardware cost and performs well in terms of PSNR and visual quality. ICIC International

Original languageEnglish
Pages (from-to)1739-1752
Number of pages14
JournalInternational Journal of Innovative Computing, Information and Control
Issue number4
Publication statusPublished - 2011 Apr 1

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Information Systems
  • Computational Theory and Mathematics


Dive into the research topics of 'An area-efficient color demosaicking scheme for vlsi architecture'. Together they form a unique fingerprint.

Cite this