An efficient architecture of multiple 8×8 transforms for H.264/AVC and VC-1 decoders

Yi Chih Chao, Shih Tse Wei, Chia Hung Kao, Bin Da Liu, Jar Ferr Yang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

This paper proposes an efficient architecture, which can perform multiple 8×8 transforms for both H.264/AVC and VC-1 decoders. The hardware design which supports multiple standards becomes more and more important. By designing a unique data flow for VC-1 8×8 inverse transform, the H.264/AVC and VC-1 8×8 inverse transforms are realized in a hardware sharing architecture. The proposed multiple transforms architecture contains fast one-dimensional (1-D) transforms and rounding operations. Simulation results show the proposed architecture takes 6, 702 gates which are much less than the individual designs for the H.264/AVC and VC-1 8×8 inverse transforms.

Original languageEnglish
Title of host publication1st International Conference on Green Circuits and Systems, ICGCS 2010
Pages595-598
Number of pages4
DOIs
Publication statusPublished - 2010
Event1st International Conference on Green Circuits and Systems, ICGCS 2010 - Shanghai, China
Duration: 2010 Jun 212010 Jun 23

Publication series

Name1st International Conference on Green Circuits and Systems, ICGCS 2010

Other

Other1st International Conference on Green Circuits and Systems, ICGCS 2010
Country/TerritoryChina
CityShanghai
Period10-06-2110-06-23

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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