An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model

Cheng Hung Wu, Kuen-Jong Lee, Wei Cheng Lien

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

This paper proposes an efficient diagnosis-aware ATPG method that can quickly identify equivalent-fault pairs and generate diagnosis patterns for nonequivalent-fault pairs, where an (non)equivalent-fault pair contains two stuck-at faults that are (not) equivalent. A novel fault injection method is developed which allows one to embed all fault pairs undistinguished by the conventional test patterns into a circuit model with only one copy of the original circuit. Each pair of faults to be processed is transformed to a stuck-at fault and all fault pairs can be dealt with by invoking an ordinary ATPG tool for stuck-at faults just once. High efficiency of diagnosis pattern generation can be achieved due to 1) the circuit to be processed is read only once, 2) the data structure for ATPG process is constructed only once, 3) multiple fault pairs can be processed at a time, and 4) only one copy of the original circuit is needed. Experimental results show that this is the first reported work that can achieve 100% diagnosis resolutions for all ISCAS'89 and IWLS'05 benchmark circuits using an ordinary ATPG tool. Furthermore, we also find that the total number of patterns required to deal with all fault pairs in our method is smaller than that of the current state-of-the-art work.

Original languageEnglish
Title of host publicationProceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014
PublisherIEEE Computer Society
ISBN (Print)9781479926114
DOIs
Publication statusPublished - 2014 Jan 1
Event2014 IEEE 32nd VLSI Test Symposium, VTS 2014 - Napa, CA, United States
Duration: 2014 Apr 132014 Apr 17

Publication series

NameProceedings of the IEEE VLSI Test Symposium

Other

Other2014 IEEE 32nd VLSI Test Symposium, VTS 2014
CountryUnited States
CityNapa, CA
Period14-04-1314-04-17

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Networks (circuits)
Data structures

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Electrical and Electronic Engineering

Cite this

Wu, C. H., Lee, K-J., & Lien, W. C. (2014). An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model. In Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014 [6818790] (Proceedings of the IEEE VLSI Test Symposium). IEEE Computer Society. https://doi.org/10.1109/VTS.2014.6818790
Wu, Cheng Hung ; Lee, Kuen-Jong ; Lien, Wei Cheng. / An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model. Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014. IEEE Computer Society, 2014. (Proceedings of the IEEE VLSI Test Symposium).
@inproceedings{c8499ef07ddc4d69b7609d8bde2b00bb,
title = "An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model",
abstract = "This paper proposes an efficient diagnosis-aware ATPG method that can quickly identify equivalent-fault pairs and generate diagnosis patterns for nonequivalent-fault pairs, where an (non)equivalent-fault pair contains two stuck-at faults that are (not) equivalent. A novel fault injection method is developed which allows one to embed all fault pairs undistinguished by the conventional test patterns into a circuit model with only one copy of the original circuit. Each pair of faults to be processed is transformed to a stuck-at fault and all fault pairs can be dealt with by invoking an ordinary ATPG tool for stuck-at faults just once. High efficiency of diagnosis pattern generation can be achieved due to 1) the circuit to be processed is read only once, 2) the data structure for ATPG process is constructed only once, 3) multiple fault pairs can be processed at a time, and 4) only one copy of the original circuit is needed. Experimental results show that this is the first reported work that can achieve 100{\%} diagnosis resolutions for all ISCAS'89 and IWLS'05 benchmark circuits using an ordinary ATPG tool. Furthermore, we also find that the total number of patterns required to deal with all fault pairs in our method is smaller than that of the current state-of-the-art work.",
author = "Wu, {Cheng Hung} and Kuen-Jong Lee and Lien, {Wei Cheng}",
year = "2014",
month = "1",
day = "1",
doi = "10.1109/VTS.2014.6818790",
language = "English",
isbn = "9781479926114",
series = "Proceedings of the IEEE VLSI Test Symposium",
publisher = "IEEE Computer Society",
booktitle = "Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014",
address = "United States",

}

Wu, CH, Lee, K-J & Lien, WC 2014, An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model. in Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014., 6818790, Proceedings of the IEEE VLSI Test Symposium, IEEE Computer Society, 2014 IEEE 32nd VLSI Test Symposium, VTS 2014, Napa, CA, United States, 14-04-13. https://doi.org/10.1109/VTS.2014.6818790

An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model. / Wu, Cheng Hung; Lee, Kuen-Jong; Lien, Wei Cheng.

Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014. IEEE Computer Society, 2014. 6818790 (Proceedings of the IEEE VLSI Test Symposium).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model

AU - Wu, Cheng Hung

AU - Lee, Kuen-Jong

AU - Lien, Wei Cheng

PY - 2014/1/1

Y1 - 2014/1/1

N2 - This paper proposes an efficient diagnosis-aware ATPG method that can quickly identify equivalent-fault pairs and generate diagnosis patterns for nonequivalent-fault pairs, where an (non)equivalent-fault pair contains two stuck-at faults that are (not) equivalent. A novel fault injection method is developed which allows one to embed all fault pairs undistinguished by the conventional test patterns into a circuit model with only one copy of the original circuit. Each pair of faults to be processed is transformed to a stuck-at fault and all fault pairs can be dealt with by invoking an ordinary ATPG tool for stuck-at faults just once. High efficiency of diagnosis pattern generation can be achieved due to 1) the circuit to be processed is read only once, 2) the data structure for ATPG process is constructed only once, 3) multiple fault pairs can be processed at a time, and 4) only one copy of the original circuit is needed. Experimental results show that this is the first reported work that can achieve 100% diagnosis resolutions for all ISCAS'89 and IWLS'05 benchmark circuits using an ordinary ATPG tool. Furthermore, we also find that the total number of patterns required to deal with all fault pairs in our method is smaller than that of the current state-of-the-art work.

AB - This paper proposes an efficient diagnosis-aware ATPG method that can quickly identify equivalent-fault pairs and generate diagnosis patterns for nonequivalent-fault pairs, where an (non)equivalent-fault pair contains two stuck-at faults that are (not) equivalent. A novel fault injection method is developed which allows one to embed all fault pairs undistinguished by the conventional test patterns into a circuit model with only one copy of the original circuit. Each pair of faults to be processed is transformed to a stuck-at fault and all fault pairs can be dealt with by invoking an ordinary ATPG tool for stuck-at faults just once. High efficiency of diagnosis pattern generation can be achieved due to 1) the circuit to be processed is read only once, 2) the data structure for ATPG process is constructed only once, 3) multiple fault pairs can be processed at a time, and 4) only one copy of the original circuit is needed. Experimental results show that this is the first reported work that can achieve 100% diagnosis resolutions for all ISCAS'89 and IWLS'05 benchmark circuits using an ordinary ATPG tool. Furthermore, we also find that the total number of patterns required to deal with all fault pairs in our method is smaller than that of the current state-of-the-art work.

UR - http://www.scopus.com/inward/record.url?scp=84901927414&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84901927414&partnerID=8YFLogxK

U2 - 10.1109/VTS.2014.6818790

DO - 10.1109/VTS.2014.6818790

M3 - Conference contribution

AN - SCOPUS:84901927414

SN - 9781479926114

T3 - Proceedings of the IEEE VLSI Test Symposium

BT - Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014

PB - IEEE Computer Society

ER -

Wu CH, Lee K-J, Lien WC. An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model. In Proceedings - 2014 IEEE 32nd VLSI Test Symposium, VTS 2014. IEEE Computer Society. 2014. 6818790. (Proceedings of the IEEE VLSI Test Symposium). https://doi.org/10.1109/VTS.2014.6818790