An efficient QR decomposition design for MIMO systems

Jing Shiun Lin; Yin Tsung Hwang; Po Han Chu; Ming-Der Shieh; Shih Hao Fang

doi:10.1109/ISCAS.2012.6271535

An efficient QR decomposition design for MIMO systems

Jing Shiun Lin, Yin Tsung Hwang, Po Han Chu, Ming-Der Shieh, Shih Hao Fang

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

Multiple-input multiple-output (MIMO) techniques have been widely used in various wireless communication systems these days. QR factorization is a fundamental module yet computationally intensive used in many MIMO detection schemes. In this paper, a complex-valued QR factorization (CQRF) scheme realized via a sequence of real-value Givens rotations is first presented. An efficient CQRF design using coordinate rotation digital computer (CORDIC) modules is next developed. The design features a highly parallel architecture to support high throughput operations. One CQRF can be obtained in every 8 clock cycles. To reduce the circuit complexity, a pipelined CORDIC structure is also applied. The implementation results in TSMC 0.18-μm CMOS process indicate that the proposed design can achieve a throughput rate of 25MCQRFs per second while consuming only 103.7k gates in circuit complexity. Performance evaluation based on a composite index consisting of area and throughput rate also shows the advantages of the proposed design against other similar works.

Original language	English
Title of host publication	ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems
Pages	1508-1511
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2012.6271535
Publication status	Published - 2012
Event	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of Duration: 2012 May 20 → 2012 May 23

Other

Other	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
Country	Korea, Republic of
City	Seoul
Period	12-05-20 → 12-05-23

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.2012.6271535

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@inproceedings{dab98ac988a04de090a2ae599ba88eec,

title = "An efficient QR decomposition design for MIMO systems",

abstract = "Multiple-input multiple-output (MIMO) techniques have been widely used in various wireless communication systems these days. QR factorization is a fundamental module yet computationally intensive used in many MIMO detection schemes. In this paper, a complex-valued QR factorization (CQRF) scheme realized via a sequence of real-value Givens rotations is first presented. An efficient CQRF design using coordinate rotation digital computer (CORDIC) modules is next developed. The design features a highly parallel architecture to support high throughput operations. One CQRF can be obtained in every 8 clock cycles. To reduce the circuit complexity, a pipelined CORDIC structure is also applied. The implementation results in TSMC 0.18-μm CMOS process indicate that the proposed design can achieve a throughput rate of 25MCQRFs per second while consuming only 103.7k gates in circuit complexity. Performance evaluation based on a composite index consisting of area and throughput rate also shows the advantages of the proposed design against other similar works.",

author = "Lin, {Jing Shiun} and Hwang, {Yin Tsung} and Chu, {Po Han} and Ming-Der Shieh and Fang, {Shih Hao}",

year = "2012",

doi = "10.1109/ISCAS.2012.6271535",

language = "English",

pages = "1508--1511",

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note = "2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 ; Conference date: 20-05-2012 Through 23-05-2012",

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TY - GEN

T1 - An efficient QR decomposition design for MIMO systems

AU - Lin, Jing Shiun

AU - Hwang, Yin Tsung

AU - Chu, Po Han

AU - Shieh, Ming-Der

AU - Fang, Shih Hao

PY - 2012

Y1 - 2012

N2 - Multiple-input multiple-output (MIMO) techniques have been widely used in various wireless communication systems these days. QR factorization is a fundamental module yet computationally intensive used in many MIMO detection schemes. In this paper, a complex-valued QR factorization (CQRF) scheme realized via a sequence of real-value Givens rotations is first presented. An efficient CQRF design using coordinate rotation digital computer (CORDIC) modules is next developed. The design features a highly parallel architecture to support high throughput operations. One CQRF can be obtained in every 8 clock cycles. To reduce the circuit complexity, a pipelined CORDIC structure is also applied. The implementation results in TSMC 0.18-μm CMOS process indicate that the proposed design can achieve a throughput rate of 25MCQRFs per second while consuming only 103.7k gates in circuit complexity. Performance evaluation based on a composite index consisting of area and throughput rate also shows the advantages of the proposed design against other similar works.

AB - Multiple-input multiple-output (MIMO) techniques have been widely used in various wireless communication systems these days. QR factorization is a fundamental module yet computationally intensive used in many MIMO detection schemes. In this paper, a complex-valued QR factorization (CQRF) scheme realized via a sequence of real-value Givens rotations is first presented. An efficient CQRF design using coordinate rotation digital computer (CORDIC) modules is next developed. The design features a highly parallel architecture to support high throughput operations. One CQRF can be obtained in every 8 clock cycles. To reduce the circuit complexity, a pipelined CORDIC structure is also applied. The implementation results in TSMC 0.18-μm CMOS process indicate that the proposed design can achieve a throughput rate of 25MCQRFs per second while consuming only 103.7k gates in circuit complexity. Performance evaluation based on a composite index consisting of area and throughput rate also shows the advantages of the proposed design against other similar works.

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BT - ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

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Y2 - 20 May 2012 through 23 May 2012

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