An energy-efficient dual-edge triggered level-converting flip-flop

Lih Yih Chiou, Shien Chun Lou

Research output: Contribution to journalConference articlepeer-review

11 Citations (Scopus)


In this paper, we propose a dual-edge triggered and dual-Vth level converting flip-flop (LCFF). The LCFF utilizes many energy-saving features that can be used in a multi-Vdd and multi-Vth system. A novel power-aware latch structure is designed to eliminate the internal power during transition. When operated in sleep mode, the power-aware latch will switch to low-leakage mode and still retain its data. Experimental results show that the proposed LCFF has the lowest PDP among compared FFs.

Original languageEnglish
Article number4252845
Pages (from-to)1157-1160
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Publication statusPublished - 2007
Event2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States
Duration: 2007 May 272007 May 30

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


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