An FPGA fault simulator for stuck-at and segment delay faults

Cheng-Wen Wu, H.-C. Liao, R.-F. Huang, J.-J. Liou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publication14th VLSI Design/CAD Symposium
Place of PublicationHualien
Publication statusPublished - 2003 Aug

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