An improved In0.5Ga0.5P/GaAs double heterostructure-emitter bipolar transistor using emitter edge-thinning technique

Yu Shyan Lin; Yu Huei Wu; Jan Shing Su; Wei Chou Hsu; Shing Dong Ho; Wei Lin

An improved In_0.5Ga_0.5P/GaAs double heterostructure-emitter bipolar transistor using emitter edge-thinning technique

Yu Shyan Lin, Yu Huei Wu, Jan Shing Su, Wei Chou Hsu, Shing Dong Ho, Wei Lin

Institute of Microelectronics

Research output: Contribution to journal › Article › peer-review

27 Citations (Scopus)

Abstract

An improved In_0.5Ga_0.5P/GaAs double heterostructure-emitter bipolar transistor (DHEBT) has been fabricated by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). The 100 A undoped GaAs spacers grown on both sides of the base are used to improve the recombination of p-n interface and to increase the common-emitter current gain. The emitter edge-thinning technique is used to reduce the surface recombination current and improve the current gain. A current gain of 180 with an offset voltage as low as 60 mV are achieved. Meanwhile, Gummel plot is shown to understand the composition of collector and base currents.

Original language	English
Pages (from-to)	2007-2009
Number of pages	3
Journal	Japanese Journal of Applied Physics
Volume	36
Issue number	4 A
Publication status	Published - 1997 Apr

All Science Journal Classification (ASJC) codes

General Engineering
General Physics and Astronomy

Cite this

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title = "An improved In0.5Ga0.5P/GaAs double heterostructure-emitter bipolar transistor using emitter edge-thinning technique",

abstract = "An improved In0.5Ga0.5P/GaAs double heterostructure-emitter bipolar transistor (DHEBT) has been fabricated by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). The 100 A undoped GaAs spacers grown on both sides of the base are used to improve the recombination of p-n interface and to increase the common-emitter current gain. The emitter edge-thinning technique is used to reduce the surface recombination current and improve the current gain. A current gain of 180 with an offset voltage as low as 60 mV are achieved. Meanwhile, Gummel plot is shown to understand the composition of collector and base currents.",

author = "Lin, {Yu Shyan} and Wu, {Yu Huei} and Su, {Jan Shing} and Hsu, {Wei Chou} and Ho, {Shing Dong} and Wei Lin",

year = "1997",

month = apr,

language = "English",

volume = "36",

pages = "2007--2009",

journal = "Japanese Journal of Applied Physics",

issn = "0021-4922",

number = "4 A",

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T1 - An improved In0.5Ga0.5P/GaAs double heterostructure-emitter bipolar transistor using emitter edge-thinning technique

AU - Lin, Yu Shyan

AU - Wu, Yu Huei

AU - Su, Jan Shing

AU - Hsu, Wei Chou

AU - Ho, Shing Dong

AU - Lin, Wei

PY - 1997/4

Y1 - 1997/4

N2 - An improved In0.5Ga0.5P/GaAs double heterostructure-emitter bipolar transistor (DHEBT) has been fabricated by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). The 100 A undoped GaAs spacers grown on both sides of the base are used to improve the recombination of p-n interface and to increase the common-emitter current gain. The emitter edge-thinning technique is used to reduce the surface recombination current and improve the current gain. A current gain of 180 with an offset voltage as low as 60 mV are achieved. Meanwhile, Gummel plot is shown to understand the composition of collector and base currents.

AB - An improved In0.5Ga0.5P/GaAs double heterostructure-emitter bipolar transistor (DHEBT) has been fabricated by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). The 100 A undoped GaAs spacers grown on both sides of the base are used to improve the recombination of p-n interface and to increase the common-emitter current gain. The emitter edge-thinning technique is used to reduce the surface recombination current and improve the current gain. A current gain of 180 with an offset voltage as low as 60 mV are achieved. Meanwhile, Gummel plot is shown to understand the composition of collector and base currents.

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M3 - Article

AN - SCOPUS:0031124897

SN - 0021-4922

VL - 36

SP - 2007

EP - 2009

JO - Japanese Journal of Applied Physics

JF - Japanese Journal of Applied Physics

IS - 4 A

ER -

An improved In_0.5Ga_0.5P/GaAs double heterostructure-emitter bipolar transistor using emitter edge-thinning technique

Abstract

All Science Journal Classification (ASJC) codes

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