An investigation on anomalous hot-carrier-induced on-resistance reduction in n-type LDMOS transistors

Jone-Fang Chen, Kuen Shiuan Tian, Shiang Yu Chen, Kuo Ming Wu, J. R. Shih, Kenneth Wu

Research output: Contribution to journalArticle

25 Citations (Scopus)

Abstract

In this paper, on-resistance $(R-{\rm on})$ degradation induced by hot-carrier injection in n-type lateral diffused metaloxidesemiconductor transistors with shallow trench isolation (STI) in the drift region is investigated. $R-{\rm on}$ unexpectedly decreases under medium- and high-gate voltage $(V-{ \rm gs})$ stress conditions. According to experimental data and technology computer-aided-design simulation results, the mechanisms responsible for anomalous $R-{\rm on}$ shift are proposed. When the device is stressed under medium $V-{\rm gs}$, hot-hole injection and trapping occur at the STI edge closest to the channel, resulting in $R-{\rm on}$ reduction. Interface trap generation $(\Delta N-{\rm it})$ occurs at the STI edge closest to the channel and nearby drift region, leading to $R-{\rm on}$ increase. For the device stressed under high $V-{\rm gs}$, $R-{\rm on}$ reduction is also attributed to hole trapping at the STI corner closest to the channel. $\Delta N-{\rm it}$ created by hot-electron injection at the STI edge closest to the drain dominates device characteristics and leads to $R-{\rm on}$ increase eventually. Based on the proposed $R-{\rm on}$ degradation mechanisms, an $R-{\rm on}$ degradation model is discussed and verified with experimental data.

Original languageEnglish
Article number5089423
Pages (from-to)459-464
Number of pages6
JournalIEEE Transactions on Device and Materials Reliability
Volume9
Issue number3
DOIs
Publication statusPublished - 2009 Sep 1

Fingerprint

Hot carriers
Transistors
Degradation
Electron injection
Hot electrons
Computer aided design
Electric potential

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Safety, Risk, Reliability and Quality
  • Electrical and Electronic Engineering

Cite this

Chen, Jone-Fang ; Tian, Kuen Shiuan ; Chen, Shiang Yu ; Wu, Kuo Ming ; Shih, J. R. ; Wu, Kenneth. / An investigation on anomalous hot-carrier-induced on-resistance reduction in n-type LDMOS transistors. In: IEEE Transactions on Device and Materials Reliability. 2009 ; Vol. 9, No. 3. pp. 459-464.
@article{2f4dfdaac5f248b4b70b6c880940c2a6,
title = "An investigation on anomalous hot-carrier-induced on-resistance reduction in n-type LDMOS transistors",
abstract = "In this paper, on-resistance $(R-{\rm on})$ degradation induced by hot-carrier injection in n-type lateral diffused metaloxidesemiconductor transistors with shallow trench isolation (STI) in the drift region is investigated. $R-{\rm on}$ unexpectedly decreases under medium- and high-gate voltage $(V-{ \rm gs})$ stress conditions. According to experimental data and technology computer-aided-design simulation results, the mechanisms responsible for anomalous $R-{\rm on}$ shift are proposed. When the device is stressed under medium $V-{\rm gs}$, hot-hole injection and trapping occur at the STI edge closest to the channel, resulting in $R-{\rm on}$ reduction. Interface trap generation $(\Delta N-{\rm it})$ occurs at the STI edge closest to the channel and nearby drift region, leading to $R-{\rm on}$ increase. For the device stressed under high $V-{\rm gs}$, $R-{\rm on}$ reduction is also attributed to hole trapping at the STI corner closest to the channel. $\Delta N-{\rm it}$ created by hot-electron injection at the STI edge closest to the drain dominates device characteristics and leads to $R-{\rm on}$ increase eventually. Based on the proposed $R-{\rm on}$ degradation mechanisms, an $R-{\rm on}$ degradation model is discussed and verified with experimental data.",
author = "Jone-Fang Chen and Tian, {Kuen Shiuan} and Chen, {Shiang Yu} and Wu, {Kuo Ming} and Shih, {J. R.} and Kenneth Wu",
year = "2009",
month = "9",
day = "1",
doi = "10.1109/TDMR.2009.2025770",
language = "English",
volume = "9",
pages = "459--464",
journal = "IEEE Transactions on Device and Materials Reliability",
issn = "1530-4388",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "3",

}

An investigation on anomalous hot-carrier-induced on-resistance reduction in n-type LDMOS transistors. / Chen, Jone-Fang; Tian, Kuen Shiuan; Chen, Shiang Yu; Wu, Kuo Ming; Shih, J. R.; Wu, Kenneth.

In: IEEE Transactions on Device and Materials Reliability, Vol. 9, No. 3, 5089423, 01.09.2009, p. 459-464.

Research output: Contribution to journalArticle

TY - JOUR

T1 - An investigation on anomalous hot-carrier-induced on-resistance reduction in n-type LDMOS transistors

AU - Chen, Jone-Fang

AU - Tian, Kuen Shiuan

AU - Chen, Shiang Yu

AU - Wu, Kuo Ming

AU - Shih, J. R.

AU - Wu, Kenneth

PY - 2009/9/1

Y1 - 2009/9/1

N2 - In this paper, on-resistance $(R-{\rm on})$ degradation induced by hot-carrier injection in n-type lateral diffused metaloxidesemiconductor transistors with shallow trench isolation (STI) in the drift region is investigated. $R-{\rm on}$ unexpectedly decreases under medium- and high-gate voltage $(V-{ \rm gs})$ stress conditions. According to experimental data and technology computer-aided-design simulation results, the mechanisms responsible for anomalous $R-{\rm on}$ shift are proposed. When the device is stressed under medium $V-{\rm gs}$, hot-hole injection and trapping occur at the STI edge closest to the channel, resulting in $R-{\rm on}$ reduction. Interface trap generation $(\Delta N-{\rm it})$ occurs at the STI edge closest to the channel and nearby drift region, leading to $R-{\rm on}$ increase. For the device stressed under high $V-{\rm gs}$, $R-{\rm on}$ reduction is also attributed to hole trapping at the STI corner closest to the channel. $\Delta N-{\rm it}$ created by hot-electron injection at the STI edge closest to the drain dominates device characteristics and leads to $R-{\rm on}$ increase eventually. Based on the proposed $R-{\rm on}$ degradation mechanisms, an $R-{\rm on}$ degradation model is discussed and verified with experimental data.

AB - In this paper, on-resistance $(R-{\rm on})$ degradation induced by hot-carrier injection in n-type lateral diffused metaloxidesemiconductor transistors with shallow trench isolation (STI) in the drift region is investigated. $R-{\rm on}$ unexpectedly decreases under medium- and high-gate voltage $(V-{ \rm gs})$ stress conditions. According to experimental data and technology computer-aided-design simulation results, the mechanisms responsible for anomalous $R-{\rm on}$ shift are proposed. When the device is stressed under medium $V-{\rm gs}$, hot-hole injection and trapping occur at the STI edge closest to the channel, resulting in $R-{\rm on}$ reduction. Interface trap generation $(\Delta N-{\rm it})$ occurs at the STI edge closest to the channel and nearby drift region, leading to $R-{\rm on}$ increase. For the device stressed under high $V-{\rm gs}$, $R-{\rm on}$ reduction is also attributed to hole trapping at the STI corner closest to the channel. $\Delta N-{\rm it}$ created by hot-electron injection at the STI edge closest to the drain dominates device characteristics and leads to $R-{\rm on}$ increase eventually. Based on the proposed $R-{\rm on}$ degradation mechanisms, an $R-{\rm on}$ degradation model is discussed and verified with experimental data.

UR - http://www.scopus.com/inward/record.url?scp=70249143685&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=70249143685&partnerID=8YFLogxK

U2 - 10.1109/TDMR.2009.2025770

DO - 10.1109/TDMR.2009.2025770

M3 - Article

VL - 9

SP - 459

EP - 464

JO - IEEE Transactions on Device and Materials Reliability

JF - IEEE Transactions on Device and Materials Reliability

SN - 1530-4388

IS - 3

M1 - 5089423

ER -