An open electronic system level multi-SPARC virtual platform and its toolchain

Pin Hao Fang, Yu Lin Wang, Zhong Ho Chen, Alvin W.Y. Su, Ce Kuen Shieh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)


We present a multi-core virtual platform which follows single-core architecture, SPARC v8, available as an open source development suite. The proposed multi-SPARC system operates at electronic system level to accelerate its simulation speed. TLM channels are devised to connect the processors. To simplify the use of the proposed virtual platform, we define some specific APIs for data transaction and developers can simply follow the pre-defined protocol and complete the data transaction. We also implement the TLM interface for external modules to communicate with the host virtual platform. Furthermore, the proposed virtual platform is capable of running multiple applications with dynamic loading of application programs in run time. That means the multiple applications could execute sequentially without pre-loading all programs when initialized. The virtual platform with 4 SPARC cores can execute up to 1605.88K cycles per second on a 2.4 GHz Core 2 Duo machine. Moreover, the developers do not take too much effort to get used to our virtual platform, since its architecture follows the traditional one, and they could concentrate on architecture implementation as well.

Original languageEnglish
Title of host publicationICS 2010 - International Computer Symposium
Number of pages5
Publication statusPublished - 2010
Event2010 International Computer Symposium, ICS 2010 - Tainan, Taiwan
Duration: 2010 Dec 162010 Dec 18

Publication series

NameICS 2010 - International Computer Symposium


Other2010 International Computer Symposium, ICS 2010

All Science Journal Classification (ASJC) codes

  • General Computer Science


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