An optimal round-robin arbiter design for NoC

A new optimal arbiter is designed. We proposed a set of optimal Boolean functions and the corresponding circuit for it, and showed that the arbitration Boolean functions derived are optimal (simplest). This new arbiter is fair for any input combinations and faster than all previous arbiters we knew. Using Synopsys design tools with TSMC 0.18 μm technology, the design results have shown that our arbiter has 22.8% improvement of execution time and 39.1% of cost (area) reduction compared with the existing fastest arbiter, SA [7]. Because of this small arbiter's the high-performance, it is extremely useful for the realizations of NoC routers, MPSoC arbitration, and ultra-high- speed switches. This new arbiter is being applied for a patent of the R.O.C. (application No.: 0972020612-0).