Abstract
The high-order Σ-Δ modulator is an appropriate approach for high-bandwidth, high-resolution A/D conversion. However, non-ideal effects such as the finite op-amp gain and the capacitor mismatch have great impacts on its performance at a low oversampling ratio. To achieve greater performance under the inevitable non-ideal effects, we explore several multiple-bit schemes, based on our CIQE high-order Σ-Δ architecture, to remove the non-ideal deterioration. Design rules of these multiple-bit schemes are developed and verified by extensive simulations.
| Original language | English |
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| Pages | 419-424 |
| Number of pages | 6 |
| Publication status | Published - 1997 Jan 1 |
| Event | Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC - Chiba, Jpn Duration: 1997 Jan 28 → 1997 Jan 31 |
Conference
| Conference | Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC |
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| City | Chiba, Jpn |
| Period | 97-01-28 → 97-01-31 |
All Science Journal Classification (ASJC) codes
- Computer Science Applications
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering