Analysis of Nonideal Behaviors Based on INL/DNL Plots for SAR ADCs

Chun Po Huang; Hsin Wen Ting; Soon Jyh Chang

doi:10.1109/TIM.2016.2562198

Analysis of Nonideal Behaviors Based on INL/DNL Plots for SAR ADCs

Chun Po Huang, Hsin Wen Ting, Soon Jyh Chang

Department of Electrical Engineering

Research output: Contribution to journal › Article

8 Citations (Scopus)

Abstract

This paper presents a comprehensive investigation of several important error sources for the successive-approximation register (SAR) analog-to-digital converters (ADCs). The error sources that we discuss in this paper include the dynamic comparator offset, the dynamic gain error of digital-to-analog converter (DAC), the capacitor mismatch of capacitive DAC, the incomplete settling of DAC, the undershoot of reference voltage, and the input signal coupling. The integral/differential nonlinearities (INL/DNL) of SAR ADCs that are resulted from these error sources are analyzed and addressed. A diagnostic procedure is presented to identify the possible error sources based on the INL/DNL plots. In addition, design suggestions for overcoming these problems are also offered and recommended in this paper.

Original language	English
Article number	7470271
Pages (from-to)	1804-1817
Number of pages	14
Journal	IEEE Transactions on Instrumentation and Measurement
Volume	65
Issue number	8
DOIs	https://doi.org/10.1109/TIM.2016.2562198
Publication status	Published - 2016 Aug

All Science Journal Classification (ASJC) codes

Instrumentation
Electrical and Electronic Engineering

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10.1109/TIM.2016.2562198

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Huang, C. P., Ting, H. W., & Chang, S. J. (2016). Analysis of Nonideal Behaviors Based on INL/DNL Plots for SAR ADCs. IEEE Transactions on Instrumentation and Measurement, 65(8), 1804-1817. [7470271]. https://doi.org/10.1109/TIM.2016.2562198

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