Along with the technology advance, the applications of flip chip have the tendency toward lower profile, lighter weight, and higher density. Due to the mismatch of the coefficients of thermal expansion (CTE) between the chip and substrate, the solder joints tend to fail under high thermal stresses. In order to enhance the reliability of the solder joints, underfill encapsulation is filled into the gap between the chip and substrate around the solder joints by capillary force. It is crucial for flip-chip technology to speed up the encapsulation process and avoid the formation of voids at the same time. A finite-element model was developed to simulate the underfill flow in our laboratory. In this paper, further verification of the underfill model is performed to confirm its feasibility. A model is proposed to design an efficient process for encapsulant dispensing based on the underfill model. Application of the model is also conducted to investigate the effect of different bump designs on the dispensing process.
|Number of pages||7|
|Journal||IEEE Transactions on Electronics Packaging Manufacturing|
|Publication status||Published - 2010 Apr 1|
All Science Journal Classification (ASJC) codes
- Industrial and Manufacturing Engineering
- Electrical and Electronic Engineering