Area-efficient versatile Reed-Solomon decoder for ADSL

Jin Chuan Huang, Chien Ming Wu, Ming-Der Shieh, Chien Hsing Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Citations (Scopus)

Abstract

We present an area-efficient, bit-serial VLSI architecture for the t-error-correcting, (n, k)-scalable Reed-Solomon (RS) decoder in GF(2m) based on the modified Euclidean algorithm. With its ability to support a variety of (n, k) RS codes, this RS decoder is suitable for applications such as the asymmetric digital subscriber line (ADSL) and cable modems.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherIEEE
ISBN (Print)0780354729
Publication statusPublished - 1999 Jan 1
EventProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 - Orlando, FL, USA
Duration: 1999 May 301999 Jun 2

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume1
ISSN (Print)0271-4310

Other

OtherProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99
CityOrlando, FL, USA
Period99-05-3099-06-02

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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