Assessment of novel phase change memory programming techniques

Yi Bo Liao; Jun Tin Lin; Meng-Hsueh Chiang; Wei-Chou Hsu

doi:10.1109/EDSSC.2008.4760662

Assessment of novel phase change memory programming techniques

Yi Bo Liao, Jun Tin Lin, Meng-Hsueh Chiang, Wei-Chou Hsu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

In this paper, we present novel phase change memory programming techniques achieving low power operation without compromising performance by using proper pulsing schemes. By applying continuous current pulses at a fixed frequency or with the same pulse magnitude, binary data are successfully written into memory cells. The proposed programming techniques can be implemented with more flexible or simplified circuitry since a single current level is shown to be sufficient for write operations of both set and reset states.

Original language	English
Title of host publication	2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
DOIs	https://doi.org/10.1109/EDSSC.2008.4760662
Publication status	Published - 2008 Dec 1
Event	2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC - Hong Kong, China Duration: 2008 Dec 8 → 2008 Dec 10

Publication series

Name	2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC

Other

Other	2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
Country/Territory	China
City	Hong Kong
Period	08-12-08 → 08-12-10

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/EDSSC.2008.4760662

Cite this

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title = "Assessment of novel phase change memory programming techniques",

abstract = "In this paper, we present novel phase change memory programming techniques achieving low power operation without compromising performance by using proper pulsing schemes. By applying continuous current pulses at a fixed frequency or with the same pulse magnitude, binary data are successfully written into memory cells. The proposed programming techniques can be implemented with more flexible or simplified circuitry since a single current level is shown to be sufficient for write operations of both set and reset states.",

author = "Liao, {Yi Bo} and Lin, {Jun Tin} and Meng-Hsueh Chiang and Wei-Chou Hsu",

year = "2008",

month = dec,

day = "1",

doi = "10.1109/EDSSC.2008.4760662",

language = "English",

isbn = "9781424425402",

series = "2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC",

booktitle = "2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC",

note = "2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC ; Conference date: 08-12-2008 Through 10-12-2008",

}

Liao, YB, Lin, JT, Chiang, M-H & Hsu, W-C 2008, Assessment of novel phase change memory programming techniques. in 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC., 4760662, 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC, 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC, Hong Kong, China, 08-12-08. https://doi.org/10.1109/EDSSC.2008.4760662

Assessment of novel phase change memory programming techniques. / Liao, Yi Bo; Lin, Jun Tin; Chiang, Meng-Hsueh et al.
2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC. 2008. 4760662 (2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

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AU - Lin, Jun Tin

AU - Chiang, Meng-Hsueh

AU - Hsu, Wei-Chou

PY - 2008/12/1

Y1 - 2008/12/1

N2 - In this paper, we present novel phase change memory programming techniques achieving low power operation without compromising performance by using proper pulsing schemes. By applying continuous current pulses at a fixed frequency or with the same pulse magnitude, binary data are successfully written into memory cells. The proposed programming techniques can be implemented with more flexible or simplified circuitry since a single current level is shown to be sufficient for write operations of both set and reset states.

AB - In this paper, we present novel phase change memory programming techniques achieving low power operation without compromising performance by using proper pulsing schemes. By applying continuous current pulses at a fixed frequency or with the same pulse magnitude, binary data are successfully written into memory cells. The proposed programming techniques can be implemented with more flexible or simplified circuitry since a single current level is shown to be sufficient for write operations of both set and reset states.

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U2 - 10.1109/EDSSC.2008.4760662

DO - 10.1109/EDSSC.2008.4760662

M3 - Conference contribution

AN - SCOPUS:63249119561

SN - 9781424425402

T3 - 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC

BT - 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC

T2 - 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC

Y2 - 8 December 2008 through 10 December 2008

ER -

Assessment of novel phase change memory programming techniques

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