Abstract
Impact of device structure variability of silicon nanowire FETs is assessed and SRAM design implication is presented based on 3-D numerical simulation. Both the conventional and junctionless nanowire FETs are shown to be sensitive to structural variation whereas the former is more tolerable. Both the circular wire and non-circular wire cases for feasible SRAM design with a focus on read/write noise margin are included in our study.
Original language | English |
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Pages (from-to) | 300-304 |
Number of pages | 5 |
Journal | Microelectronics Journal |
Volume | 43 |
Issue number | 5 |
DOIs | |
Publication status | Published - 2012 May |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering