Augmenting slicing trees for analog placement

Mark Po Hung Lin, Bo Hao Chiang, Jen Chieh Chang, Yu Chang Wu, Rong Guey Chang, Shuenn-Yuh Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

The slicing-tree representation had been proven to be very effective and efficient in optimizing floorplanning/placement and handling design/layout migration in modern system-on-chips (SoCs). However, none of the previous works introduced any symmetric-feasible condition in the slicing trees for analog device-level placement. This paper augments the slicing trees by introducing a new insertion operation and presents the symmetric-feasible conditions. Based on the augmented slicing trees and the symmetric-feasible conditions, various symmetric placements can be effectively explored during analog placement optimization.

Original languageEnglish
Title of host publication2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
Pages57-60
Number of pages4
DOIs
Publication statusPublished - 2012 Dec 11
Event2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012 - Seville, Spain
Duration: 2012 Sep 192012 Sep 21

Publication series

Name2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012

Other

Other2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
CountrySpain
CitySeville
Period12-09-1912-09-21

All Science Journal Classification (ASJC) codes

  • Modelling and Simulation

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