TY - JOUR
T1 - Automated passive filter synthesis using a novel tree representation and genetic programming
AU - Chang, Shoou Jinn
AU - Hou, Hao Sheng
AU - Su, Yan Kuin
N1 - Funding Information:
Manuscript received August 3, 2004; revised February 10, 2005. This work was supported in part by the National Science Council under Contract NSC-91-2215-E-006-012. The authors are with the Institute of Microelectronics and the Department of Electrical Engineering, National Cheng Kung University, Tainan 70101, Taiwan (e-mail: hsh@mail.njtc.edu.tw). Digital Object Identifier 10.1109/TEVC.2005.861415
PY - 2006/2
Y1 - 2006/2
N2 - This paper proposes a novel tree representation which is suitable for the analysis of RLC (i.e., resistor, inductor, and capacitor) circuits. Genetic programming (GP) based on the tree representation is applied to passive filter synthesis problems. The GP is optimized and then incorporated into an algorithm which can automatically find parsimonious solutions without predetermining the number of the required circuit components. The experimental results show the proposed method is efficient in three aspects. First, the GP-evolved circuits are more parsimonious than those resulting from traditional design methods in many cases. Second, the proposed method is faster than previous work and can effectively generate parsimonious filters of very high order where conventional methods fail. Third, when the component values are restricted to a set of preferred values, the GP method can generate compliant solutions by means of novel circuit topology.
AB - This paper proposes a novel tree representation which is suitable for the analysis of RLC (i.e., resistor, inductor, and capacitor) circuits. Genetic programming (GP) based on the tree representation is applied to passive filter synthesis problems. The GP is optimized and then incorporated into an algorithm which can automatically find parsimonious solutions without predetermining the number of the required circuit components. The experimental results show the proposed method is efficient in three aspects. First, the GP-evolved circuits are more parsimonious than those resulting from traditional design methods in many cases. Second, the proposed method is faster than previous work and can effectively generate parsimonious filters of very high order where conventional methods fail. Third, when the component values are restricted to a set of preferred values, the GP method can generate compliant solutions by means of novel circuit topology.
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U2 - 10.1109/TEVC.2005.861415
DO - 10.1109/TEVC.2005.861415
M3 - Article
AN - SCOPUS:31744451963
VL - 10
SP - 93
EP - 100
JO - IEEE Transactions on Evolutionary Computation
JF - IEEE Transactions on Evolutionary Computation
SN - 1089-778X
IS - 1
ER -