Block pipeline 2-D IIR filter structures via iteration and retiming

Research output: Contribution to journalConference articlepeer-review

3 Citations (Scopus)

Abstract

Systolic arrays are presented for real-time 2-D infinite impulse response (IIR) filters, based on the transfer function model. Two-dimensional iteration and retiming techniques are depicted to illustrate block pipelining algorithms, which guarantee high-throughput operation for real-time applications. The systolic realizations are more regular and much faster than the previously published designs. All broadcast data lines can be eliminated, and the arrays can be fully pipelined. The retiming approach is shown to be superior to the iteration method. Examples are given for first- and second-order filters.

Original languageEnglish
Pages (from-to)731-734
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume1
Publication statusPublished - 1990 Dec 1
Event1990 IEEE International Symposium on Circuits and Systems Part 4 (of 4) - New Orleans, LA, USA
Duration: 1990 May 11990 May 3

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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