Boundary scan and core-based testing

Research output: Chapter in Book/Report/Conference proceedingChapter

2 Citations (Scopus)

Abstract

Boundary scan, also known as the IEEE or JTAG standard, appears to be the most successful test standard ever approved by the IEEE. This chapter focuses on the 1149.1, 1149.6, and 1500 test standards. Test architectures to support these standards are also reviewed in the chapter. Currently, boundary scan is widely used throughout the industry; most commercial computer-aided test tools provide automatic synthesis capability for boundary-scan design. This chapter introduces the boundary-scan family of standards and their current status. The 1149.1 standard is then described in detail. On-chip design to support scan and BIST by 1149.1 and board or system-level controller design for 1149.1 is also briefly addresses in the chapter. It also presents test control architectures to support 1500 design with the plug-and-play feature and hierarchical test structures. This chapter concludes by discussing a comparison between 1149.1 and 1500.

Original languageEnglish
Title of host publicationVLSI Test Principles and Architectures
PublisherElsevier Inc.
Pages557-618
Number of pages62
ISBN (Print)9780123705976
DOIs
Publication statusPublished - 2006 Dec 1

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Testing
Industry
Controller

All Science Journal Classification (ASJC) codes

  • Business, Management and Accounting(all)

Cite this

Lee, K-J. (2006). Boundary scan and core-based testing. In VLSI Test Principles and Architectures (pp. 557-618). Elsevier Inc.. https://doi.org/10.1016/B978-012370597-6/50014-7
Lee, Kuen-Jong. / Boundary scan and core-based testing. VLSI Test Principles and Architectures. Elsevier Inc., 2006. pp. 557-618
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Lee, K-J 2006, Boundary scan and core-based testing. in VLSI Test Principles and Architectures. Elsevier Inc., pp. 557-618. https://doi.org/10.1016/B978-012370597-6/50014-7

Boundary scan and core-based testing. / Lee, Kuen-Jong.

VLSI Test Principles and Architectures. Elsevier Inc., 2006. p. 557-618.

Research output: Chapter in Book/Report/Conference proceedingChapter

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Lee K-J. Boundary scan and core-based testing. In VLSI Test Principles and Architectures. Elsevier Inc. 2006. p. 557-618 https://doi.org/10.1016/B978-012370597-6/50014-7