BSIM4 and BSIM multi-gate progress

Mohan V. Dunga, Chung Hsun Lin, Xuemei Xi, S. Chen, Darsen D. Lu, Ali M. Niknejad, Chenming Hu

Research output: Contribution to conferencePaperpeer-review

11 Citations (Scopus)

Abstract

New technologies and alternate transistor structures are being developed to extend the CMOS scaling. Device models need to be developed and improved in parallel with the technology advancements to enable an efficient and quick adoption of the new technologies. Some of the recent advances in BSIM4 and BSIM Multi-gate models towards meeting this goal are presented in this paper. Improvements to the BSIM4 model include holistic stress-induced mobility enhancement model and a high-k dynamic behavior model. Preliminary results of the modeling of multi-gate architectures are also presented.

Original languageEnglish
Pages658-661
Number of pages4
Publication statusPublished - 2006
Event2006 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings - Boston, MA, United States
Duration: 2006 May 72006 May 11

Other

Other2006 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings
CountryUnited States
CityBoston, MA
Period06-05-0706-05-11

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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