TY - GEN
T1 - Building multi-kernel embedded system on PAC multi-core platform
AU - Chen, Jing
AU - Young, Chung Ping
AU - Chang, Da Wei
AU - Huang, Guan Ying
AU - Ke, Chung Yuan
AU - Yen, Shih Tun
AU - Kuo, Tsang Shuo
PY - 2010
Y1 - 2010
N2 - It is common nowadays that consumer embedded system products are built on platforms with System-On-a-Chip (SOC) in which two or more processor cores, which are not necessarily of the same type, are put into a single chip and form the architecture of Chip-level Multi-Processor (CMP). Although such platform is capable of achieving high performance at relatively low cost, the system architecture of CMP brings new design challenges as well as increased complexity in developing embedded software especially at the level of kernel or operating system software. This paper presents our experience and some preliminary results from the project of building a multi-kernel embedded system platform for application software running in the environment of a newly developed multi-core SOC, namely PAC Duo SOC, which is the latest product from the PAC (short for Parallel Architecture Core) Project initiated by the Industry Technology Research Institute (ITRI) in Taiwan. PAC Duo SOC is a chip-level heterogeneous multi-processor SOC composed of one ARM926 core serving as the general purpose processor (GPP for short) and two ITRI PAC DSP cores serving as the special purpose processors (SPP). We ported Linux operating system to run on the ARM926 processor and ported μC/OS-II real-time kernel to run on one PAC DSP core, leaving the other PAC DSP core with the option, for flexibility, of running either μC/OS-II or a different kernel. In addition, an inter-processor communication (IPC) mechanism is developed which not only takes application-specific requirements into account but also takes advantages of hardware features.
AB - It is common nowadays that consumer embedded system products are built on platforms with System-On-a-Chip (SOC) in which two or more processor cores, which are not necessarily of the same type, are put into a single chip and form the architecture of Chip-level Multi-Processor (CMP). Although such platform is capable of achieving high performance at relatively low cost, the system architecture of CMP brings new design challenges as well as increased complexity in developing embedded software especially at the level of kernel or operating system software. This paper presents our experience and some preliminary results from the project of building a multi-kernel embedded system platform for application software running in the environment of a newly developed multi-core SOC, namely PAC Duo SOC, which is the latest product from the PAC (short for Parallel Architecture Core) Project initiated by the Industry Technology Research Institute (ITRI) in Taiwan. PAC Duo SOC is a chip-level heterogeneous multi-processor SOC composed of one ARM926 core serving as the general purpose processor (GPP for short) and two ITRI PAC DSP cores serving as the special purpose processors (SPP). We ported Linux operating system to run on the ARM926 processor and ported μC/OS-II real-time kernel to run on one PAC DSP core, leaving the other PAC DSP core with the option, for flexibility, of running either μC/OS-II or a different kernel. In addition, an inter-processor communication (IPC) mechanism is developed which not only takes application-specific requirements into account but also takes advantages of hardware features.
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U2 - 10.1109/QSIC.2010.65
DO - 10.1109/QSIC.2010.65
M3 - Conference contribution
AN - SCOPUS:77958178548
SN - 9780769541310
T3 - Proceedings - International Conference on Quality Software
SP - 465
EP - 472
BT - Proceedings - 10th International Conference on Quality Software, QSIC 2010
T2 - 10th International Conference on Quality Software, QSIC 2010
Y2 - 14 July 2010 through 15 July 2010
ER -