TY - GEN
T1 - Built-in high resolution signal generator for testing ADC and DAC
AU - Chang, Yeong Jar
AU - Chang, Soon Jyh
AU - Ho, Jung Chi
AU - Ong, Chee Kian
AU - Cheng, Ting
AU - Wu, Wen Ching
N1 - Publisher Copyright:
© 2003 IEEE.
PY - 2003
Y1 - 2003
N2 - This paper presents a design of the built-in high resolution signal generator for testing analog-to-digital converter (ADC) and digital-to-analog converter (DAC). The sigma-delta demodulator scheme is used in the design to generate on-chip high accurate stimulus. We discuss the issues on the generation of all the required stimuli using the same circuitry and other issues on implementing this scheme. Our signal generator can be applied to test the embedded 13-bit ADC and DAC in Asvmmetry Digital Subscriber Line System on a Chip (ADSL SoC).
AB - This paper presents a design of the built-in high resolution signal generator for testing analog-to-digital converter (ADC) and digital-to-analog converter (DAC). The sigma-delta demodulator scheme is used in the design to generate on-chip high accurate stimulus. We discuss the issues on the generation of all the required stimuli using the same circuitry and other issues on implementing this scheme. Our signal generator can be applied to test the embedded 13-bit ADC and DAC in Asvmmetry Digital Subscriber Line System on a Chip (ADSL SoC).
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U2 - 10.1109/VTSA.2003.1252595
DO - 10.1109/VTSA.2003.1252595
M3 - Conference contribution
AN - SCOPUS:33646405670
T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
SP - 231
EP - 234
BT - VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 20th International Symposium on VLSI Technology, Systems and Applications, VLSI 2003
Y2 - 6 October 2003 through 8 October 2003
ER -