Abstract
Embedded memory test and diagnosis is becoming an important issue in system-on-chip (SOC) development. Direct access of the memory cores from the limited number of I/O pins is usually not feasible. Built-in self-diagnosis (BISD), which include built-in self-test (BIST), is rapidly becoming the most acceptable solution. We propose a BISD design and a fault diagnosis system for embedded SRAM. It supports manufacturing test as well as diagnosis for design verification and yield improvement. The proposed BISD circuit is on-line programmable for its March test algorithms. Test chips have been designed and implemented. Our experimental results show that the BISD hardware overhead is about 2.4% for a typical 128 Kb SRAM and only 0.65% for a 2 Mb SRAM.
Original language | English |
---|---|
Pages (from-to) | 45-50 |
Number of pages | 6 |
Journal | Proceedings of the Asian Test Symposium |
Publication status | Published - 2000 Dec 1 |
Event | 9th Asian Test Symposium - Taipei, Taiwan Duration: 2000 Dec 4 → 2000 Dec 6 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering