Cache write generate for parallel image processing on shared memory architectures

Craig M. Wittenbrink, Arun K. Somani, Chung-Ho Chen

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

We investigate cache write generate, our cache mode invention. We demonstrate that for parallel image processing applications, the new mode improves main memory bandwidth, CPU efficiency, cache hits, and cache latency. We use register level simulations validated by the UW-Proteus system. Many memory, cache, and processor configurations are evaluated.

Original languageEnglish
Pages (from-to)1204-1208
Number of pages5
JournalIEEE Transactions on Image Processing
Volume5
Issue number7
DOIs
Publication statusPublished - 1996 Dec 1

Fingerprint

Cache memory
Memory architecture
Patents and inventions
Program processors
Image processing
Bandwidth
Data storage equipment

All Science Journal Classification (ASJC) codes

  • Software
  • Computer Graphics and Computer-Aided Design

Cite this

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Cache write generate for parallel image processing on shared memory architectures. / Wittenbrink, Craig M.; Somani, Arun K.; Chen, Chung-Ho.

In: IEEE Transactions on Image Processing, Vol. 5, No. 7, 01.12.1996, p. 1204-1208.

Research output: Contribution to journalArticle

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