For switching DC-DC converters, a large and rapid load-current transient ΔIload causes a large output voltage undershoot ΔVUS and long settling time ts if the transient responses are slow . Since the output capacitor current ICo instantly reflects ΔIload, transient response optimization for minimizing ΔVUS and ts with given charging and discharging slopes of inductor current ILo can be achieved by obtaining an accurate ICo and well-controlling the ILo charging time tch and discharging time tdch . However, ICo sensing accuracy is degraded if the output capacitor's impedance ZCo, comprising the capacitance CO, equivalent series resistance RESR and inductance LESL, varies with different output voltage VO, process variation, and/or PCB parasitics, leading to non-minimized ΔVUS and ts. An off-chip capacitor-current-sensor (CCS) calibration technique is reported in ; however, LESL is not considered, so the high-frequency information of ΔIload is inaccurately sensed when large and rapid ΔIload occurs. On the other hand, to well-control the tch and tdch of ILo, the transient-optimized feedback circuit reported in  minimizes ΔVUS and ts. However, optimization can be achieved only under fixed CO, output inductor LO, input voltage VIN, and VO.