TY - JOUR
T1 - Characteristics enhancement of a GaAs based heterostructure field-effect transistor with an electrophoretic deposition (EPD) surface treated gate structure
AU - Chen, Chun Chia
AU - Chen, Huey Ing
AU - Liu, I. Ping
AU - Chou, Po Cheng
AU - Liou, Jian Kai
AU - Tsai, Yu Ting
AU - Liu, Wen Chau
N1 - Publisher Copyright:
© 2015 Elsevier B.V. All rights reserved.
PY - 2015/6/30
Y1 - 2015/6/30
N2 - A Pt/AlGaAs/InGaAs/GaAs heterostructure field-effect transistor (HFET), prepared by an electrophoretic deposition (EPD) approach on gate Schottky contact region, is fabricated and studied. The EPD-based Pt-gates with three different molar ratios (ω 0 ) are examined by scanning electron microscopy (SEM) image. Good Pt-gate coverage with effective reduction of thermal-induced defects at Pt/AlGaAs interface is achieved through a low temperature EPD approach. Experimentally, for a gate dimension of 1 μm × 100 μm, a lower gate current of 1.9 × 10 -2 mA/mm, a higher turn-on voltage of 0.85 V, a higher maximum drain saturation current of 319.3 mA/mm, and a higher maximum extrinsic transconductance of 146.8 mS/mm are obtained for an EPD-based HFET at 300 K. Moreover, comparable microwave characteristics of an EPD-based HFET are demonstrated at different temperature ambiences. Therefore, based on the improved DC performance and inherent benefits of low cost, simple apparatus, flexible deposition on varied substrates, and adjustable alloy grain size, the proposed EPD approach shows the promise to fabricate high-performance electronic devices.
AB - A Pt/AlGaAs/InGaAs/GaAs heterostructure field-effect transistor (HFET), prepared by an electrophoretic deposition (EPD) approach on gate Schottky contact region, is fabricated and studied. The EPD-based Pt-gates with three different molar ratios (ω 0 ) are examined by scanning electron microscopy (SEM) image. Good Pt-gate coverage with effective reduction of thermal-induced defects at Pt/AlGaAs interface is achieved through a low temperature EPD approach. Experimentally, for a gate dimension of 1 μm × 100 μm, a lower gate current of 1.9 × 10 -2 mA/mm, a higher turn-on voltage of 0.85 V, a higher maximum drain saturation current of 319.3 mA/mm, and a higher maximum extrinsic transconductance of 146.8 mS/mm are obtained for an EPD-based HFET at 300 K. Moreover, comparable microwave characteristics of an EPD-based HFET are demonstrated at different temperature ambiences. Therefore, based on the improved DC performance and inherent benefits of low cost, simple apparatus, flexible deposition on varied substrates, and adjustable alloy grain size, the proposed EPD approach shows the promise to fabricate high-performance electronic devices.
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U2 - 10.1016/j.apsusc.2015.03.016
DO - 10.1016/j.apsusc.2015.03.016
M3 - Article
AN - SCOPUS:84926364422
SN - 0169-4332
VL - 341
SP - 120
EP - 126
JO - Applied Surface Science
JF - Applied Surface Science
ER -