Characteristics of an electroless plated-gate transistor

Temperature-dependent characteristics of an interesting pseudomorphic high electron mobility transistor with an electroless plated (EP) gate metal are studied and demonstrated. Under the low-temperature and low-energy electrochemical deposition conditions, the EP deposition technique provides an oxide-free metal-semiconductor interface with the reduction in surface damages. Experimentally, for a 1×100 μ m² gate-dimension EP-device, significant improvements of forward voltage, gate leakage current, Schottky barrier height, ideality factor, transconductance, drain saturation current, and IDS operating regime are found. In addition, good thermal stability of device properties are found as the temperature is increased from 300 to 500 K. Under an accelerated stress test, the studied EP-device also shows better performance over a wide temperature range. Therefore, the studied EP-gate device has a promise for high-performance electronic applications.