Abstract
In this work, Pd-GaAs Schottky diodes have been fabricated by a novel electroless plating technique. A scanning electron microscope (SEM) and Raman spectra are used to characterize the surface morphology of Pd film and Pd-GaAs interface, respectively. Effects of plating variables including concentrations of PdCl 2, N 2H 4 and bulk plating bath, as well as the plating time, on the Pd surface morphology and current-voltage (I-V) characteristics are investigated. From experimental results, it is revealed that I-V characteristics of Pd-GaAs diodes are strongly influenced by the Pd grain size. The Schottky barrier height is increased with decreasing Pd grain size and particle size distribution by lowering the plating temperature and concentrations of PdCl 2, N 2H 4 and bulk plating bath. Moreover, in the presence of sodium, I-V characteristics of the studied diodes are obviously inferior. Based on these results, the high performance Pd-GaAs Schottky diodes can be obtained by appropriately manipulating the plating conditions.
Original language | English |
---|---|
Pages (from-to) | 620-626 |
Number of pages | 7 |
Journal | Semiconductor Science and Technology |
Volume | 18 |
Issue number | 7 |
DOIs | |
Publication status | Published - 2003 Jul 1 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry