Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

Meng Fan Chang; Ku Feng Lin; Ching Hao Chuang; Li Yue Huang; Tun Fei Chien; Shyh Shyuan Sheu; Keng Li Su; Heng Yuan Lee; Frederick T. Chen; Chen Hsin Lien; Ping Cheng Chen; Lih Yih Chiou; Tzu Kun Ku; Ming Jinn Tsai; Ming Jer Kao

doi:10.1109/ICSICT.2012.6467794

Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

Meng Fan Chang, Ku Feng Lin, Ching Hao Chuang, Li Yue Huang, Tun Fei Chien, Shyh Shyuan Sheu, Keng Li Su, Heng Yuan Lee, Frederick T. Chen, Chen Hsin Lien, Ping Cheng Chen, Lih Yih Chiou, Tzu Kun Ku, Ming Jinn Tsai, Ming Jer Kao

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

Nonvolatile memory has become a bottleneck in attempts to reduce the energy consumption of electronic systems. Several emerging forms of nonvolatile memory have shown promise in overcoming these difficulties, achieving faster write speeds and lower power operations than those afforded by Flash memories. Unfortunately, constraints related to bitline bias-voltage, small read cell current, and process variation detract considerably from the efficiency of read operations. This paper provides a review of the challenges and trends associated with the read sensing circuitry used in emerging nonvolatile memories.

Original language	English
Title of host publication	ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
DOIs	https://doi.org/10.1109/ICSICT.2012.6467794
Publication status	Published - 2012
Event	2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012 - Xi'an, China Duration: 2012 Oct 29 → 2012 Nov 1

Publication series

Name	ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Other

Other	2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012
Country	China
City	Xi'an
Period	12-10-29 → 12-11-01

All Science Journal Classification (ASJC) codes

Human-Computer Interaction
Electrical and Electronic Engineering

Access to Document

10.1109/ICSICT.2012.6467794

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Chang, M. F., Lin, K. F., Chuang, C. H., Huang, L. Y., Chien, T. F., Sheu, S. S., Su, K. L., Lee, H. Y., Chen, F. T., Lien, C. H., Chen, P. C., Chiou, L. Y., Ku, T. K., Tsai, M. J., & Kao, M. J. (2012). Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory. In ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings [6467794] (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). https://doi.org/10.1109/ICSICT.2012.6467794

Chang, Meng Fan ; Lin, Ku Feng ; Chuang, Ching Hao ; Huang, Li Yue ; Chien, Tun Fei ; Sheu, Shyh Shyuan ; Su, Keng Li ; Lee, Heng Yuan ; Chen, Frederick T. ; Lien, Chen Hsin ; Chen, Ping Cheng ; Chiou, Lih Yih ; Ku, Tzu Kun ; Tsai, Ming Jinn ; Kao, Ming Jer. / Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory. ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

@inproceedings{e505b94161304c169e5b4d6a2bc782f0,

title = "Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory",

abstract = "Nonvolatile memory has become a bottleneck in attempts to reduce the energy consumption of electronic systems. Several emerging forms of nonvolatile memory have shown promise in overcoming these difficulties, achieving faster write speeds and lower power operations than those afforded by Flash memories. Unfortunately, constraints related to bitline bias-voltage, small read cell current, and process variation detract considerably from the efficiency of read operations. This paper provides a review of the challenges and trends associated with the read sensing circuitry used in emerging nonvolatile memories.",

author = "Chang, {Meng Fan} and Lin, {Ku Feng} and Chuang, {Ching Hao} and Huang, {Li Yue} and Chien, {Tun Fei} and Sheu, {Shyh Shyuan} and Su, {Keng Li} and Lee, {Heng Yuan} and Chen, {Frederick T.} and Lien, {Chen Hsin} and Chen, {Ping Cheng} and Chiou, {Lih Yih} and Ku, {Tzu Kun} and Tsai, {Ming Jinn} and Kao, {Ming Jer}",

note = "Copyright: Copyright 2013 Elsevier B.V., All rights reserved.; 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012 ; Conference date: 29-10-2012 Through 01-11-2012",

year = "2012",

doi = "10.1109/ICSICT.2012.6467794",

language = "English",

isbn = "9781467324724",

series = "ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings",

booktitle = "ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings",

}

Chang, MF, Lin, KF, Chuang, CH, Huang, LY, Chien, TF, Sheu, SS, Su, KL, Lee, HY, Chen, FT, Lien, CH, Chen, PC, Chiou, LY, Ku, TK, Tsai, MJ & Kao, MJ 2012, Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory. in ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings., 6467794, ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012, Xi'an, China, 12-10-29. https://doi.org/10.1109/ICSICT.2012.6467794

Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory. / Chang, Meng Fan; Lin, Ku Feng; Chuang, Ching Hao; Huang, Li Yue; Chien, Tun Fei; Sheu, Shyh Shyuan; Su, Keng Li; Lee, Heng Yuan; Chen, Frederick T.; Lien, Chen Hsin; Chen, Ping Cheng; Chiou, Lih Yih; Ku, Tzu Kun; Tsai, Ming Jinn; Kao, Ming Jer.

ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. 6467794 (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

AU - Chang, Meng Fan

AU - Lin, Ku Feng

AU - Chuang, Ching Hao

AU - Huang, Li Yue

AU - Chien, Tun Fei

AU - Sheu, Shyh Shyuan

AU - Su, Keng Li

AU - Lee, Heng Yuan

AU - Chen, Frederick T.

AU - Lien, Chen Hsin

AU - Chen, Ping Cheng

AU - Chiou, Lih Yih

AU - Ku, Tzu Kun

AU - Tsai, Ming Jinn

AU - Kao, Ming Jer

PY - 2012

Y1 - 2012

N2 - Nonvolatile memory has become a bottleneck in attempts to reduce the energy consumption of electronic systems. Several emerging forms of nonvolatile memory have shown promise in overcoming these difficulties, achieving faster write speeds and lower power operations than those afforded by Flash memories. Unfortunately, constraints related to bitline bias-voltage, small read cell current, and process variation detract considerably from the efficiency of read operations. This paper provides a review of the challenges and trends associated with the read sensing circuitry used in emerging nonvolatile memories.

AB - Nonvolatile memory has become a bottleneck in attempts to reduce the energy consumption of electronic systems. Several emerging forms of nonvolatile memory have shown promise in overcoming these difficulties, achieving faster write speeds and lower power operations than those afforded by Flash memories. Unfortunately, constraints related to bitline bias-voltage, small read cell current, and process variation detract considerably from the efficiency of read operations. This paper provides a review of the challenges and trends associated with the read sensing circuitry used in emerging nonvolatile memories.

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U2 - 10.1109/ICSICT.2012.6467794

DO - 10.1109/ICSICT.2012.6467794

M3 - Conference contribution

AN - SCOPUS:84874899509

SN - 9781467324724

T3 - ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

BT - ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

T2 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012

Y2 - 29 October 2012 through 1 November 2012

ER -

Chang MF, Lin KF, Chuang CH, Huang LY, Chien TF, Sheu SS et al. Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory. In ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. 6467794. (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). https://doi.org/10.1109/ICSICT.2012.6467794