CMAC neural network chip for color correction

Rong Chang Wen, Jar Shone Ker, Yau-Hwang Kuo, Bin-Da Liu, Gao Wei Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

This paper presents the design and implementation of a CMAC neural network chip used in color image reproduction systems for color correction. An effective address mapping procedure is proposed to implement the hardware architecture of CMAC model, which has the advantages of high processing speed and low chip area overhead. VHDL-based high-level synthesis approach is employed for the synthesis of logic circuit of CMAC chip.

Original languageEnglish
Title of host publicationIEEE International Conference on Neural Networks - Conference Proceedings
PublisherIEEE
Pages1943-1946
Number of pages4
Volume3
Publication statusPublished - 1994
EventProceedings of the 1994 IEEE International Conference on Neural Networks. Part 1 (of 7) - Orlando, FL, USA
Duration: 1994 Jun 271994 Jun 29

Other

OtherProceedings of the 1994 IEEE International Conference on Neural Networks. Part 1 (of 7)
CityOrlando, FL, USA
Period94-06-2794-06-29

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All Science Journal Classification (ASJC) codes

  • Software

Cite this

Wen, R. C., Ker, J. S., Kuo, Y-H., Liu, B-D., & Chang, G. W. (1994). CMAC neural network chip for color correction. In IEEE International Conference on Neural Networks - Conference Proceedings (Vol. 3, pp. 1943-1946). IEEE.