Combined 2-D transform and quantization architectures for H.264 video coders

Heng Yao Lin, Yi Chih Chao, Che Hong Chen, Bin Da Liu, Jar Ferr Yang

Research output: Contribution to journalConference article

40 Citations (Scopus)

Abstract

In this paper, the low-complexity hardware architectures of 4×4 forward and inverse transforms with integrated quantizer and dequantizer for H.264 advanced video coders (AVC) are proposed. By applying the regularity of the quantization matrix, the quantization can be merged into transform step, which results in the reduction of the hardware complexity in VLSI implementation. The proposed integrated transforms have been synthesized with TSMC 0.35 μm technology. Simulation results show that it can achieve 256 M samples/sec at 32 MHz in encoder part and 448 M samples/sec at 56 MHz in decoder part, respectively.

Original languageEnglish
Article number1464959
Pages (from-to)1802-1805
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
DOIs
Publication statusPublished - 2005 Dec 1
EventIEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan
Duration: 2005 May 232005 May 26

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Hardware
Inverse transforms

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

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abstract = "In this paper, the low-complexity hardware architectures of 4×4 forward and inverse transforms with integrated quantizer and dequantizer for H.264 advanced video coders (AVC) are proposed. By applying the regularity of the quantization matrix, the quantization can be merged into transform step, which results in the reduction of the hardware complexity in VLSI implementation. The proposed integrated transforms have been synthesized with TSMC 0.35 μm technology. Simulation results show that it can achieve 256 M samples/sec at 32 MHz in encoder part and 448 M samples/sec at 56 MHz in decoder part, respectively.",
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Combined 2-D transform and quantization architectures for H.264 video coders. / Lin, Heng Yao; Chao, Yi Chih; Chen, Che Hong; Liu, Bin Da; Yang, Jar Ferr.

In: Proceedings - IEEE International Symposium on Circuits and Systems, 01.12.2005, p. 1802-1805.

Research output: Contribution to journalConference article

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T1 - Combined 2-D transform and quantization architectures for H.264 video coders

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AU - Chao, Yi Chih

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AU - Yang, Jar Ferr

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AB - In this paper, the low-complexity hardware architectures of 4×4 forward and inverse transforms with integrated quantizer and dequantizer for H.264 advanced video coders (AVC) are proposed. By applying the regularity of the quantization matrix, the quantization can be merged into transform step, which results in the reduction of the hardware complexity in VLSI implementation. The proposed integrated transforms have been synthesized with TSMC 0.35 μm technology. Simulation results show that it can achieve 256 M samples/sec at 32 MHz in encoder part and 448 M samples/sec at 56 MHz in decoder part, respectively.

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