TY - GEN
T1 - Compact double-balanced star mixers with novel dual 180° hybrids
AU - Lai, Yu Ann
AU - Chen, Chun Nien
AU - Hung, Shih Han
AU - Wang, Yeong-Her
PY - 2012/12/1
Y1 - 2012/12/1
N2 - Compact double-balanced monolithic star mixers using 0.25 μm GaAs pHEMT process are presented. These star mixers adopt two novel types of the dual 180° hybrid structure, thereby reducing the chip size and eliminating complex layout. With multi-coupled lines technology, the proposed dual 180° hybrids are produced and applied to star mixers successfully. Furthermore, the proposed hybrids simplifies the star mixer's IF extraction circuit to reduce the chip size and enhance the IF bandwidth. The results demonstrate wide operation bandwidth, low conversion loss and good port-to-port isolations with a size dimension of less than 0.81 mm2, could thus be obtained.
AB - Compact double-balanced monolithic star mixers using 0.25 μm GaAs pHEMT process are presented. These star mixers adopt two novel types of the dual 180° hybrid structure, thereby reducing the chip size and eliminating complex layout. With multi-coupled lines technology, the proposed dual 180° hybrids are produced and applied to star mixers successfully. Furthermore, the proposed hybrids simplifies the star mixer's IF extraction circuit to reduce the chip size and enhance the IF bandwidth. The results demonstrate wide operation bandwidth, low conversion loss and good port-to-port isolations with a size dimension of less than 0.81 mm2, could thus be obtained.
UR - http://www.scopus.com/inward/record.url?scp=84874878028&partnerID=8YFLogxK
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U2 - 10.1109/ICSICT.2012.6466754
DO - 10.1109/ICSICT.2012.6466754
M3 - Conference contribution
AN - SCOPUS:84874878028
SN - 9781467324724
T3 - ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
BT - ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
T2 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012
Y2 - 29 October 2012 through 1 November 2012
ER -