TY - JOUR
T1 - Comparative Evaluation of Spin-Transfer-Torque and Magnetoelectric Random Access Memory
AU - Wang, Shaodi
AU - Lee, Hochul
AU - Ebrahimi, Farbod
AU - Khalili Amiri, P.
AU - Wang, Kang L.
AU - Gupta, Puneet
N1 - Publisher Copyright:
© 2011 IEEE.
Copyright:
Copyright 2016 Elsevier B.V., All rights reserved.
PY - 2016/6
Y1 - 2016/6
N2 - Spin-Transfer torque random access memory (STT-RAM), as a promising nonvolatile memory technology, faces challenges of high write energy and low density. The recently developed magnetoelectric random access memory (MeRAM) enables the possibility of overcoming these challenges by the use of voltage-controlled magnetic anisotropy (VCMA) effect and achieves high density, fast speed, and low energy simultaneously. As both STT-RAM and MeRAM suffer from the reliability problem of write errors, we implement a fast Landau-Lifshitz-Gilbert equation-based simulator to capture their write error rate (WER) under process and temperature variation. We utilize a multi-write peripheral circuit to minimize WER and design reliable STT-RAM and MeRAM. With the same acceptable WER, MeRAM shows advantages of 83% faster write speed, 67.4% less write energy, 138% faster read speed, and 28.2% less read energy compared with STT-RAM. Benefiting from the VCMA effect, MeRAM also achieves twice the density of STT-RAM with a 32 nm technology node, and this density difference is expected to increase with technology scaling down.
AB - Spin-Transfer torque random access memory (STT-RAM), as a promising nonvolatile memory technology, faces challenges of high write energy and low density. The recently developed magnetoelectric random access memory (MeRAM) enables the possibility of overcoming these challenges by the use of voltage-controlled magnetic anisotropy (VCMA) effect and achieves high density, fast speed, and low energy simultaneously. As both STT-RAM and MeRAM suffer from the reliability problem of write errors, we implement a fast Landau-Lifshitz-Gilbert equation-based simulator to capture their write error rate (WER) under process and temperature variation. We utilize a multi-write peripheral circuit to minimize WER and design reliable STT-RAM and MeRAM. With the same acceptable WER, MeRAM shows advantages of 83% faster write speed, 67.4% less write energy, 138% faster read speed, and 28.2% less read energy compared with STT-RAM. Benefiting from the VCMA effect, MeRAM also achieves twice the density of STT-RAM with a 32 nm technology node, and this density difference is expected to increase with technology scaling down.
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U2 - 10.1109/JETCAS.2016.2547681
DO - 10.1109/JETCAS.2016.2547681
M3 - Article
AN - SCOPUS:84979492160
VL - 6
SP - 134
EP - 145
JO - IEEE Journal on Emerging and Selected Topics in Circuits and Systems
JF - IEEE Journal on Emerging and Selected Topics in Circuits and Systems
SN - 2156-3357
IS - 2
M1 - 7448479
ER -