Comparative study of process variations in junctionless and conventional double-gate MOSFETs

Chun Yu Chen, Jyi Tsong Lin, Meng-Hsueh Chiang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Citations (Scopus)

Abstract

This work presents an in-detail investigation of process variations in symmetrical junctionless double-gate CMOS using 2D numerical simulation. General variability issues including oxide thickness, gate work function, and channel thickness are discussed. Uniform probability density function was assumed for the dopant atom location in the junctionless channel. Based on the statistical doping profiles, device simulation was performed by solving 2D drift-diffusion equations with modified local density approximation as used mostly in bulks device for quantum confinement. This paper is organized as follows. Section II introduces the simulation technique for device structure. Section III presents a comprehensive analysis for impact of process fluctuations on threshold voltage. Finally, conclusions are drawn.

Original languageEnglish
Title of host publicationIEEE Nanotechnology Materials and Devices Conference, IEEE NMDC 2013
PublisherIEEE Computer Society
Pages81-83
Number of pages3
ISBN (Print)9781479933877
DOIs
Publication statusPublished - 2013
Event2013 IEEE 8th Nanotechnology Materials and Devices Conference, IEEE NMDC 2013 - Tainan, Taiwan
Duration: 2013 Oct 62013 Oct 9

Other

Other2013 IEEE 8th Nanotechnology Materials and Devices Conference, IEEE NMDC 2013
CountryTaiwan
CityTainan
Period13-10-0613-10-09

All Science Journal Classification (ASJC) codes

  • Mechanics of Materials

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    Chen, C. Y., Lin, J. T., & Chiang, M-H. (2013). Comparative study of process variations in junctionless and conventional double-gate MOSFETs. In IEEE Nanotechnology Materials and Devices Conference, IEEE NMDC 2013 (pp. 81-83). [6707461] IEEE Computer Society. https://doi.org/10.1109/NMDC.2013.6707461