A CAD tool is presented for producing very high-throughput FIR filters. Because the CAD tool is application-specific, it is a very high-level tool. An engineer only needs to specify 1) the filter order, N; 2) the input word size; and 3) the output word size. Using this information, the CAD tool generates CIF files fora filter system that can process 10N million samples per second. The purpose of the paper is to illustrate the benefits of applying both bit-level systolic array architecture and application-specific CAD to the problem of FIR filtering. The resulting CAD system reduces the costs of very high-throughput FIR filters with respect to design, fabrication, and operation.
|Number of pages||12|
|Journal||Proceedings of the IEEE|
|Publication status||Published - 1987 Jan 1|
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering