Concurrent error detection and correction in dual basis multiplier over GF(2m)

C. W. Chiou, C. Y. Lee, J. M. Lin, Ting-Wei Hou, C. C. Chang

Research output: Contribution to journalArticle

12 Citations (Scopus)

Abstract

Fault-based side-channel cryptanalysis is a useful technique against symmetrical and asymmetrical encryption/decryption algorithms. Thus, eliminating cryptographic computation errors become critical in preventing such kind of attacks. A simple way to eliminating cryptographic computation errors is to output correct or corrected ciphers. Multiplication is the most important finite field arithmetic operation in the cryptographic computations. By using time redundancy technique, a novel dual basis (DB) multiplier over Galois fields (2m) will be presented with lower space complexity and feedback-free property. Based on the proposed feedback-free DB multiplier, the DB multiplier with a concurrent error detection (CED) capability is also easily developed. Compared with the existing DB multiplier with CED capability, the proposed one saves about 90 of time-area complexity. No existing DB multiplier in the literature has concurrent error correction (CEC) capability. Based on the proposed DB multiplier, a novel DB multiplier with CEC capability is easily designed. The proposed DB multiplier with CEC capability requires only about 3 of extra space complexity and 15 of time complexity when compared with the proposed DB multiplier without CEC.

Original languageEnglish
Pages (from-to)22-40
Number of pages19
JournalIET Circuits, Devices and Systems
Volume3
Issue number1
DOIs
Publication statusPublished - 2009 Feb 11

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Error detection
Error correction
Feedback
Cryptography
Redundancy

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering
  • Electrical and Electronic Engineering

Cite this

Chiou, C. W. ; Lee, C. Y. ; Lin, J. M. ; Hou, Ting-Wei ; Chang, C. C. / Concurrent error detection and correction in dual basis multiplier over GF(2m). In: IET Circuits, Devices and Systems. 2009 ; Vol. 3, No. 1. pp. 22-40.
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Concurrent error detection and correction in dual basis multiplier over GF(2m). / Chiou, C. W.; Lee, C. Y.; Lin, J. M.; Hou, Ting-Wei; Chang, C. C.

In: IET Circuits, Devices and Systems, Vol. 3, No. 1, 11.02.2009, p. 22-40.

Research output: Contribution to journalArticle

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