Cost and benefit models for logic and memory BIST

Juin Ming Lu, Cheng Wen Wu

Research output: Contribution to journalConference article

23 Citations (Scopus)

Abstract

We present cost and benefit models and analyze the economics effects of built-in self-test (BIST) for logic and memory cores. In our cost and benefit models for BIST, we take into consideration the design verification time and test development time associated with testability. Experimental results for logic BIST and memory BIST examples show that a threshold volume exists when BIST is profitable for the logic core under consideration - it is not recommended for a higher volume. However, BIST is a good choice for memory cores in general.

Original languageEnglish
Article number840865
Pages (from-to)710-714
Number of pages5
JournalProceedings -Design, Automation and Test in Europe, DATE
DOIs
Publication statusPublished - 2000 Dec 1
EventDesign, Automation and Test in Europe Conference and Exhibition 2000, DATE 2000 - Paris, France
Duration: 2000 Mar 272000 Mar 30

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All Science Journal Classification (ASJC) codes

  • Engineering(all)

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