DC control and observation structures for analog circuits

Yeong Ruey Shieh, Cheng Wen Wu

Research output: Contribution to journalConference articlepeer-review

4 Citations (Scopus)

Abstract

As the complexity of electronic circuits and systems increases, so does the complexity of testing them. The level-sensitive scan-design (LSSD) structure used in a digital circuit enhances the controllability and observability of the circuit under test. For analog circuits, there also are several approaches proposed to improve their observability, based on the LSSD concept. However, none of these approaches provide control and observation capability for all test points simultaneously. In this paper, we propose two control and observation structures for analog circuits without using extra power supply. Using our approach, one is able to observe and control the DC voltage levels of all test points simultaneously, which is the basic diagnosis capability for the analog circuit under test. A calibration process is presented to ensure the accuracy of the excitation and read-out voltage levels.

Original languageEnglish
Pages (from-to)120-126
Number of pages7
JournalProceedings of the Asian Test Symposium
Publication statusPublished - 1995 Dec 1
EventProceedings of the 1995 4th Asian Test Symposium - Bangalore, India
Duration: 1995 Nov 231995 Nov 24

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Media Technology

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