Design and analysis of an interleave controlled series buck converter with low load current ripple

Cai Yang Ko, Tsorng-Juu Liang, Kai Hui Chen, Jiann-Fuh Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In this paper, a novel high step-down DC-DC converter is proposed. The voltage conversion gain of this converter is Vo/Vin=D 2. By using the interleaved control, the output current ripple is reduced and the transient response is improved. The operating principles and small-signal analysis are discussed. Finally, a laboratory prototype circuit with input voltage 12 V and output 1.5 V / 50 A is implemented to verify the proposed converter.

Original languageEnglish
Title of host publicationProceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Pages672-675
Number of pages4
DOIs
Publication statusPublished - 2010 Dec 1
Event2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia
Duration: 2010 Dec 62010 Dec 9

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
CountryMalaysia
CityKuala Lumpur
Period10-12-0610-12-09

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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