Design and analysis of high order leapfrog topologies for sigma-delta A/D converters

Wen Bin Lin; Tai Haur Kuo; Chuen Hsien Su; Ji Rong Chen

Design and analysis of high order leapfrog topologies for sigma-delta A/D converters

Wen Bin Lin, Tai Haur Kuo, Chuen Hsien Su, Ji Rong Chen

Department of Electrical Engineering

Research output: Contribution to conference › Paper › peer-review

4 Citations (Scopus)

Abstract

A methodology for the design and analysis of the best fourth-order topology for sigma-delta modulators (SDM) is described. In the determination of stable topology for analysis, theoretical analysis, combined with DC analysis was used to determine the ranges of loop coefficients which stabilize the system, while a numerical analysis was employed to analyze the ranges of loop coefficients. The analysis provided stable regions in the frequency domain from where a set of loop coefficients for VLSI implementation was selected. With this set of coefficients, the results of simulated behavior of fourth-order leapfrog topology indicated the potential application of fourth-order topology to ultra-high resolution signal processing system.

Original language	English
Pages	484-489
Number of pages	6
Publication status	Published - 1994 Dec 1
Event	Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems - Taipei, Taiwan Duration: 1994 Dec 5 → 1994 Dec 8

Other

Other	Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems
City	Taipei, Taiwan
Period	94-12-05 → 94-12-08

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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title = "Design and analysis of high order leapfrog topologies for sigma-delta A/D converters",

abstract = "A methodology for the design and analysis of the best fourth-order topology for sigma-delta modulators (SDM) is described. In the determination of stable topology for analysis, theoretical analysis, combined with DC analysis was used to determine the ranges of loop coefficients which stabilize the system, while a numerical analysis was employed to analyze the ranges of loop coefficients. The analysis provided stable regions in the frequency domain from where a set of loop coefficients for VLSI implementation was selected. With this set of coefficients, the results of simulated behavior of fourth-order leapfrog topology indicated the potential application of fourth-order topology to ultra-high resolution signal processing system.",

author = "Lin, {Wen Bin} and Kuo, {Tai Haur} and Su, {Chuen Hsien} and Chen, {Ji Rong}",

year = "1994",

month = dec,

day = "1",

language = "English",

pages = "484--489",

note = "Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems ; Conference date: 05-12-1994 Through 08-12-1994",

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TY - CONF

T1 - Design and analysis of high order leapfrog topologies for sigma-delta A/D converters

AU - Lin, Wen Bin

AU - Kuo, Tai Haur

AU - Su, Chuen Hsien

AU - Chen, Ji Rong

PY - 1994/12/1

Y1 - 1994/12/1

N2 - A methodology for the design and analysis of the best fourth-order topology for sigma-delta modulators (SDM) is described. In the determination of stable topology for analysis, theoretical analysis, combined with DC analysis was used to determine the ranges of loop coefficients which stabilize the system, while a numerical analysis was employed to analyze the ranges of loop coefficients. The analysis provided stable regions in the frequency domain from where a set of loop coefficients for VLSI implementation was selected. With this set of coefficients, the results of simulated behavior of fourth-order leapfrog topology indicated the potential application of fourth-order topology to ultra-high resolution signal processing system.

AB - A methodology for the design and analysis of the best fourth-order topology for sigma-delta modulators (SDM) is described. In the determination of stable topology for analysis, theoretical analysis, combined with DC analysis was used to determine the ranges of loop coefficients which stabilize the system, while a numerical analysis was employed to analyze the ranges of loop coefficients. The analysis provided stable regions in the frequency domain from where a set of loop coefficients for VLSI implementation was selected. With this set of coefficients, the results of simulated behavior of fourth-order leapfrog topology indicated the potential application of fourth-order topology to ultra-high resolution signal processing system.

UR - http://www.scopus.com/inward/record.url?scp=0028751008&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0028751008&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0028751008

SP - 484

EP - 489

T2 - Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems

Y2 - 5 December 1994 through 8 December 1994

ER -

Design and analysis of high order leapfrog topologies for sigma-delta A/D converters

Abstract

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All Science Journal Classification (ASJC) codes

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