This paper describes the design of the de-interleaver and punctured Viterbi decoder for the Eureka-147 DAB system and their corresponding VLSI implementations. We emphasize on how to efficiently handle four DAB transmission modes, time/frequency de-interleaving and path_metric/survivor memory management in our development. Results show that our implementation has the characteristics of modular design, consuming less silicon area, and facilitating the extension for high transmission rate requirement. The core size of the resulting chip implementation is 4990×4930 μm2 based on the TSMC 0.6μm single-polysilicon-triple-metal CMOS process.
All Science Journal Classification (ASJC) codes
- Media Technology
- Electrical and Electronic Engineering