Abstract
This paper describes the design of de-interleaver and Viterbi decoder for the Eureka-147 DAB system and their corresponding VLSI implementations. We emphasize on how to efficiently handle four DAB transmission modes, time/frequency de-interleaving and path metric/survivor memory management in our development. Results show that our implementation has the potentials of consuming less silicon area and power dissipation, and facilitating the extension for high transmission rate requirement.
| Original language | English |
|---|---|
| Pages (from-to) | 74-75 |
| Number of pages | 2 |
| Journal | Digest of Technical Papers - IEEE International Conference on Consumer Electronics |
| Publication status | Published - 1999 |
| Event | Proceedings of the 1999 IEEE International Conference on Consumer Electronics, ICCE'99 - Los Angeles, CA, USA Duration: 1999 Jun 22 → 1999 Jun 24 |
All Science Journal Classification (ASJC) codes
- Industrial and Manufacturing Engineering
- Electrical and Electronic Engineering