Design and Implementation of a DSP Controlled Bridgeless Power Factor Corrector

Sheng Ju Chen, Tsorng-Juu Liang, Wei Jing Tseng, Pin Yi Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

When conventional boost power factor corrector (PFC) circuit operates in high power application, rectifier bridge diode causes high power loss. A bridgeless PFC circuit with digital signal processor (DSP) control is implemented in this paper. Average current mode is implemented by DSP and the input current follows the input voltage. Therefore, the PFC converter achieves high power factor and low total harmonic distortion current. The operating principle of semi-boost PFC converter is analyzed and the parameters of key components are design. The software of average current mode control in DSP is described. Outer voltage loop, inner current loop and the design of the compensator are introduced. Finally, a 1.3 kw bridgeless PFC circuit with DSP control is implemented. Input voltage range is $90 V_{rms} ~ 264 V_{rms}$ and output voltage is constant 400 V. Maximum efficiency is 98.1%. Maximum power factor is 0.996 and minimum iTHD is 5.1%.

Original languageEnglish
Title of host publication2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538681367
DOIs
Publication statusPublished - 2019 Jan 11
Event2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018 - Singapore, Singapore
Duration: 2018 Oct 302018 Nov 2

Publication series

Name2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018

Conference

Conference2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018
CountrySingapore
CitySingapore
Period18-10-3018-11-02

Fingerprint

Digital signal processors
Electric potential
Networks (circuits)
Harmonic distortion
Diodes
efficiency
cause

All Science Journal Classification (ASJC) codes

  • Transportation
  • Energy Engineering and Power Technology
  • Renewable Energy, Sustainability and the Environment
  • Electrical and Electronic Engineering

Cite this

Chen, S. J., Liang, T-J., Tseng, W. J., & Liu, P. Y. (2019). Design and Implementation of a DSP Controlled Bridgeless Power Factor Corrector. In 2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018 [8610830] (2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ACEPT.2018.8610830
Chen, Sheng Ju ; Liang, Tsorng-Juu ; Tseng, Wei Jing ; Liu, Pin Yi. / Design and Implementation of a DSP Controlled Bridgeless Power Factor Corrector. 2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018. Institute of Electrical and Electronics Engineers Inc., 2019. (2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018).
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title = "Design and Implementation of a DSP Controlled Bridgeless Power Factor Corrector",
abstract = "When conventional boost power factor corrector (PFC) circuit operates in high power application, rectifier bridge diode causes high power loss. A bridgeless PFC circuit with digital signal processor (DSP) control is implemented in this paper. Average current mode is implemented by DSP and the input current follows the input voltage. Therefore, the PFC converter achieves high power factor and low total harmonic distortion current. The operating principle of semi-boost PFC converter is analyzed and the parameters of key components are design. The software of average current mode control in DSP is described. Outer voltage loop, inner current loop and the design of the compensator are introduced. Finally, a 1.3 kw bridgeless PFC circuit with DSP control is implemented. Input voltage range is $90 V_{rms} ~ 264 V_{rms}$ and output voltage is constant 400 V. Maximum efficiency is 98.1{\%}. Maximum power factor is 0.996 and minimum iTHD is 5.1{\%}.",
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Chen, SJ, Liang, T-J, Tseng, WJ & Liu, PY 2019, Design and Implementation of a DSP Controlled Bridgeless Power Factor Corrector. in 2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018., 8610830, 2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018, Institute of Electrical and Electronics Engineers Inc., 2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018, Singapore, Singapore, 18-10-30. https://doi.org/10.1109/ACEPT.2018.8610830

Design and Implementation of a DSP Controlled Bridgeless Power Factor Corrector. / Chen, Sheng Ju; Liang, Tsorng-Juu; Tseng, Wei Jing; Liu, Pin Yi.

2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018. Institute of Electrical and Electronics Engineers Inc., 2019. 8610830 (2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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N2 - When conventional boost power factor corrector (PFC) circuit operates in high power application, rectifier bridge diode causes high power loss. A bridgeless PFC circuit with digital signal processor (DSP) control is implemented in this paper. Average current mode is implemented by DSP and the input current follows the input voltage. Therefore, the PFC converter achieves high power factor and low total harmonic distortion current. The operating principle of semi-boost PFC converter is analyzed and the parameters of key components are design. The software of average current mode control in DSP is described. Outer voltage loop, inner current loop and the design of the compensator are introduced. Finally, a 1.3 kw bridgeless PFC circuit with DSP control is implemented. Input voltage range is $90 V_{rms} ~ 264 V_{rms}$ and output voltage is constant 400 V. Maximum efficiency is 98.1%. Maximum power factor is 0.996 and minimum iTHD is 5.1%.

AB - When conventional boost power factor corrector (PFC) circuit operates in high power application, rectifier bridge diode causes high power loss. A bridgeless PFC circuit with digital signal processor (DSP) control is implemented in this paper. Average current mode is implemented by DSP and the input current follows the input voltage. Therefore, the PFC converter achieves high power factor and low total harmonic distortion current. The operating principle of semi-boost PFC converter is analyzed and the parameters of key components are design. The software of average current mode control in DSP is described. Outer voltage loop, inner current loop and the design of the compensator are introduced. Finally, a 1.3 kw bridgeless PFC circuit with DSP control is implemented. Input voltage range is $90 V_{rms} ~ 264 V_{rms}$ and output voltage is constant 400 V. Maximum efficiency is 98.1%. Maximum power factor is 0.996 and minimum iTHD is 5.1%.

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Chen SJ, Liang T-J, Tseng WJ, Liu PY. Design and Implementation of a DSP Controlled Bridgeless Power Factor Corrector. In 2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018. Institute of Electrical and Electronics Engineers Inc. 2019. 8610830. (2018 Asian Conference on Energy, Power and Transportation Electrification, ACEPT 2018). https://doi.org/10.1109/ACEPT.2018.8610830